Staff Product Designer, Pentest as a Service
HackerOneSalary not specified
Not SpecifiedCompensation
Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level
Full TimeJob Type
UnknownVisa
Semiconductors, Consumer ElectronicsIndustries
Requirements
- BSc, Masters, or PhD in Computer Science/Engineering, or equivalent combination of education, training, and experience
- 10+ years of experience in SOC or ASIC design and architecture
- Prior direct experience (> 7 years) in Fabric, System Cache, DRAM controller Architecture or microarchitecture
- Understanding of memory controller architecture, memory scheduling, prioritization and QoS
- Detailed knowledge of ARM bus infrastructure (ACE/AXI/AHB)
- Fluid knowledge of one or more JEDEC standards such as LPDDR, DDR, or HBM, and the ability to analyze such standards and drive recommendations
- Background in memory systems and computer architecture to understand the tradeoffs among memory bandwidth, latency, performance, power, SoC area
- Experience with BookSim Simulator (special attribute)
- Experience with Platform Architect (special attribute)
Responsibilities
- Guide on development of innovative Fabric, System cache and DRAM controller Architectural and microarchitectural features to boost power and performance on various targeted workloads in next generation SOCs
- Identify and deliver Fabric, System cache and DRAM controller subsystem architecture proposals for products in new and existing markets
- Evaluate architecture proposal benefits in collaboration with team of SoC Architects and communicate the results across related engineering audiences (SW, HW, Architecture, Leadership)
- Perform high-level performance modeling/simulation and analysis of Fabric, System cache and DRAM controller features, applications, benchmarks, and complex uses cases
- Direct and orchestrate performance modeling, and studies to support inclusion of these features in the next generation “Fabric, System cache and DRAM controller” microarchitecture based on performance, area or power improvement
- Deliver architecture/microarchitecture proposals and specifications to the design team and articulate them effectively across audiences ranging from hardware & software engineers to architecture community peers, and to technology leadership
- Collaborate with silicon bring-up and product teams to verify and debug the proposal and its delivered performance
- Collaborate across teams to bring microarchitectural proposals to fruition across the SOC, Driver, OS, System through detailed documentations
Skills
SoC Architecture
Fabric
System Cache
DRAM Controller
Microarchitecture
Performance Modeling
Power Optimization
Simulation
Samsung Research America
Develops advanced technology in multiple domains
About Samsung Research America
Samsung Research America specializes in advanced technologies such as next-generation communications, artificial intelligence, digital media, mobile platforms, and digital health. Their innovations include FadeNet, a convolutional neural-network based technology, and the ECG Monitor App, which enables ECG recording using Galaxy Watch for atrial fibrillation screening.
665 Clyde Ave, Mountain View, CA 94043, USAHeadquarters
1988Year Founded
VENTURE_UNKNOWNCompany Stage
HardwareIndustries
501-1,000Employees
Benefits
Onsite Fitness Facility
Subsidized Meals
Coffee Barista Bar
Samsung University
Product Discounts
Dog Friendly Campus
Wellness Programs
Activity Clubs
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