SoC Memory Subsystem Architect at Baidu USA

Sunnyvale, California, United States

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Not SpecifiedCompensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

AI, SemiconductorIndustries

Requirements

10+ years of experience in Silicon architecture or IP design, primarily focusing on memory subsystems
Strong understanding of distributed AI training system requirements on SoC memory subsystems
Demonstrated experience in HW digital design and understanding of CPU/HW Accelerators and/or Peripheral design
Familiarity with SW and Operating system practices and requirements on memory systems
Experience in System Performance analysis and debug in pre and/or Post-Silicon environments
Solid background of System interconnect, System MMUs, Caches, and Memory Technologies (e.g., HBM, GDDR, DDR, and LPDDR4/5)
Experience with data analysis using Excel, Perl, Python, etc
Master or PhD in Electrical or Computer Engineering
Excellent communication skills in both English and Chinese

Responsibilities

Develop architecture and micro-architecture to improve the state-of-the-art AI SoC memory system
Explore and evaluate architectural design choices in SoC fabrics, system caches, system coherency, and MMUs
Work with software and SoC design teams to define architecture and build a unified memory space system across distributed AI training systems
Collaborate with hardware design, verification, emulation, and validation teams to build and test the hardware architecture, performance, and functionality
Participate in performance simulation of features to improve memory subsystem efficiency
Analyze benchmarks, application workloads, and performance simulation results to identify areas for microarchitecture optimizations
Debug performance and functional issues using high-level models, RTL simulation, and silicon

Skills

Key technologies and capabilities for this role

SoC ArchitectureMemory SubsystemMicroarchitectureSystem CachesCoherencyMMURTL SimulationPerformance SimulationSilicon DebugDistributed AI TrainingAI Accelerators

Questions & Answers

Common questions about this position

What is the salary for this Memory Subsystem Architect position?

This information is not specified in the job description.

Is this role remote or onsite?

This is an onsite position at Baidu’s Sunnyvale office.

What are the key skills required for this role?

Candidates need 10+ years in Silicon architecture or IP design focusing on memory subsystems, strong understanding of distributed AI training systems, experience in HW digital design, familiarity with SW/OS practices, system performance analysis, and background in system interconnects, MMUs, caches, and memory technologies like HBM and DDR.

What is the company culture like for this team?

The culture fits self-directed individuals who are mission-aligned, hungry to learn, and team-oriented, thriving in a small, fast-paced team environment.

What makes a strong candidate for this position?

A strong candidate is a motivated self-starter with 10+ years of memory subsystem experience, a Master's or PhD in Electrical or Computer Engineering, excellent communication skills in English and Chinese, and a passion for AI hardware challenges in a fast-paced team.

Baidu USA

Culturally tailored search technology provider

About Baidu USA

Baidu's main product is an intelligent, culturally tailored search technology that powers various community-based and vertical search-based products, including web search, Baidu PostBar, Baidu Knows, Baidu Encyclopedia, Maps, Image Search, Video Search, and News Search. Their cutting-edge Box Computing Open Platform provides deep-linked content and applications directly through the search box, demonstrating their commitment to continually innovating to enhance user experience.

3822+XCF, Shang Di Shi Jie, Hai Dian Qu, Bei Jing Shi, China, 100193Headquarters

2000Year Founded

$8,590.8MTotal Funding

EARLY_STAGE_VCCompany Stage

Data & AnalyticsIndustries

10,001+Employees