PCIe/CXL Design Tech Lead at Altera

Penang, Malaysia

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Not SpecifiedCompensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

SemiconductorsIndustries

Requirements

Bachelor’s degree in electrical/computer engineering or related field and 7+ years of experience OR a master’s degree in electrical/computer engineering or related field and 6+ years of experience
Experience in micro-architecture (clocking, reset, power, etc.) definition & debug
Good knowledge of PCIe/CXL or high-speed serial interface protocol, such as USB or Ethernet
5+ years of RTL coding and/or IP integration experience into SoC design
Experience in design related tools such as LINT, CDC, PT-STA, Fishtail, Power UPF etc. & design concepts such as data flow, algorithm state machine, finite state machines, and timing charts
Knowledge on FPGA background (preferred)
Highly motivated individual, team player with good communication skills

Responsibilities

Develop logic/RTL design and simulation for IP/SoC design & integrate logic of IP blocks and subsystems into a full chip SoC or discrete component design
Participate in the definition of PCIe/CXL architecture and microarchitecture features of the block being designed
Work with IP providers to integrate and validate IPs at the SoC level
Apply various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation
Review the verification plan and implementation to ensure design features are verified correctly and resolve and implement corrective measures for failing RTL tests to ensure correctness of features
Perform quality checks in various logic design aspects ranging from RTL to timing/power convergence
Drive quality assurance compliance for smooth IP/SoC handoff

Skills

Key technologies and capabilities for this role

PCIeCXLRTLSoCmicro-architectureIP integrationLINTCDCPT-STAFishtailUPFFPGAFSMtiming analysisclockingresetpower management

Questions & Answers

Common questions about this position

What are the education and experience requirements for this role?

A Bachelor’s degree in electrical/computer engineering or related field with 7+ years of experience, or a Master’s degree with 6+ years of experience is required.

What key technical skills are needed for the PCIe/CXL Design Tech Lead position?

Requires 5+ years of RTL coding and/or IP integration into SoC design, experience in micro-architecture definition and debug (clocking, reset, power), good knowledge of PCIe/CXL or high-speed serial protocols like USB or Ethernet, and familiarity with tools such as LINT, CDC, PT-STA, Fishtail, and Power UPF.

Where is this position located?

The primary location is Penang 15, with an additional location at Ecospace 1, and it involves Shift 1 in Malaysia.

What is the salary for this role?

This information is not specified in the job description.

What soft skills or qualities make a strong candidate for this position?

Highly motivated individuals who are team players with good communication skills are preferred, along with FPGA background as a plus.

Altera

Develops digital human agents for AI

About Altera

Altera develops digital human agents that mimic human traits like empathy, friendship, and fun. Their primary product allows users to interact with an AI agent while playing Minecraft, creating a friendly and engaging experience. Altera's agents are designed to be interoperable and capable of long-term autonomy, making them suitable for both individual users and businesses. Unlike many competitors, Altera focuses on advancing research and scaling technology to deliver unique, human-like AI products. The company's goal is to redefine AI agents, enhancing their versatility and human-like qualities.

San Francisco, CaliforniaHeadquarters

2023Year Founded

$10.7MTotal Funding

SEEDCompany Stage

Consumer Software, AI & Machine LearningIndustries

11-50Employees