IC Package Engineer at Etched.ai

Cupertino, California, United States

Etched.ai Logo
Not SpecifiedCompensation
Senior (5 to 8 years)Experience Level
Full TimeJob Type
UnknownVisa
Semiconductor, Artificial IntelligenceIndustries

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, or related discipline
  • 5+ years of experience in advanced IC package design, including CoWoS or equivalent technologies
  • Proven experience in substrate layout and BGA package design for large ball arrays (>4000 balls) with >20Ghz signaling and >500W
  • Strong understanding of stiffener design, open vs. closed package requirements, and package warpage and coplanarity challenges across various sizes
  • Proficiency in package design tools such as Cadence APD/SIP, Mentor

Responsibilities

  • Own the end-to-end package design process, including substrate layout and IC package design, while collaborating with internal teams and external vendors to deliver optimized, manufacturable solutions
  • Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating stiffeners as needed
  • Expertise in large-scale BGA design, including experience with packages exceeding 4000-ball arrays, ball pitch optimization, routing, and power/ground plane design
  • Conduct mechanical and warpage analysis to address package warpage and coplanarity requirements across varying package sizes, collaborating with mechanical teams for simulation and testing to minimize thermal and mechanical stress
  • Perform design validation by assessing package layouts against electrical and mechanical constraints, providing design reviews and guidance on substrate and interconnect solutions, while archiving DFM-related learning for continuous improvement opportunities
  • Collaborate cross-functionally with chip design, thermal, mechanical, and manufacturing teams to ensure holistic package solutions, while interfacing with vendors to align design requirements and production feasibility
  • Oversee package reliability testing, including thermal, warpage, shock, shear, HTSL, HAST, ALT, JESD22, and electrical tests, while interfacing with various vendors to ensure compliance and quality

Skills

Key technologies and capabilities for this role

CoWoSBGA designSubstrate layoutCadence APD/SIPMentor GraphicsStiffener designPackage warpage mitigationCoplanarity analysisHeterogeneous integration

Questions & Answers

Common questions about this position

What is the salary for the IC Package Engineer position?

This information is not specified in the job description.

Is this IC Package Engineer role remote or office-based?

This information is not specified in the job description.

What skills and experience are required for the IC Package Engineer role?

Candidates need 5+ years in advanced IC package design including CoWoS, proven experience in substrate layout and large BGA packages (>4000 balls) with >20GHz signaling and >500W, strong knowledge of stiffener design, warpage mitigation, and proficiency in tools like Cadence APD/SIP and Mentor. A Bachelor’s or Master’s in Electrical or Mechanical Engineering or related field is required.

What is the company culture like at Etched.ai?

This information is not specified in the job description.

What makes a strong candidate for the IC Package Engineer position?

The strongest candidates have extensive hands-on experience with CoWoS or equivalent advanced packaging, large-scale BGA designs exceeding 4000 balls with high signaling and power requirements, and expertise in warpage mitigation and tools like Cadence APD/SIP.

Etched.ai

Develops servers for transformer inference

About Etched.ai

The company specializes in developing powerful servers for transformer inference, utilizing transformer architecture integrated into their chips to achieve highly efficient and advanced technology. The main technologies used in the product are transformer architecture and advanced chip integration.

Cupertino, CA, USAHeadquarters
2022Year Founded
$5.4MTotal Funding
SEEDCompany Stage
HardwareIndustries
11-50Employees

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