Remote Jobs at Rivos

Candidates should possess a Master’s Degree or Bachelor’s Degree with 3-5 years of experience in digital logic verification, specifically related to DDR/HBM memory subsystem designs. Strong knowledge of JEDEC specifications for LPDDRx, DDRx, and HBMx is required, along with familiarity with DDR DFI specification and protocol. Experience with Reliability, availability and serviceability (RAS) features within memory subsystems, including error detection/correction and encryption, is also desired.

- Knowledge of high-speed, high-power, system design - Knowledge of defining routing constraints for high-speed interfaces - Familiarity with a variety of board-level interfaces: I2C, SPI, DDR, etc - Design and analysis of power supplies as well as power integrity analysis - Excellent signal integrity analysis and measurement techniques - CPU/SOC/Microcontroller system architecture expertise - Test automation expertise using Python - Board level analog and digital circuit design expertise - HDL …

- Deep understanding of the challenges associated with deep sub-micron process nodes - Hands-on experience in closure and tapeout of large hierarchical designs - Experience with industry standard physical verification tools (Siemens Calibre) - Strong scripting skills in tcl and python - Ability and taste for solving complex problems - Efficient written and verbal communication - Excellent organization skills - Self starter and highly motivated - Ability to work cross-functionally with various te…

- In-depth knowledge of architecture, microarchitecture, and software interface of the subsystem - Experienced level knowledge of C/C++ and Python - Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation - Experience in silicon debug for logic, software, and physical issues - Strong ability to triage issues and develop environment and tools - Excellent skills in problem solving, written and verbal communication, excellent organization skills, and hi…

- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated - Minimum of 10-12 years of ATE experience developing test programs for server, client/mobile, or HPC products - Strong understanding of hardware design requirements (CPM/IBIS models, SI/PI simulation) for probe-card, load-board, burn-in boards - Hands-on experience with ATE test equipment (Advantest SMT8 preferred) writing Scan / Mbist / PHY tests, developing product…

Candidates should possess at least 3 years of experience in numerical library development, demonstrating strong C++ programming skills and a solid understanding of parallel programming languages. Experience with PyTorch is preferred, along with a background in dense linear algebra software, excellent problem-solving skills, and effective written and verbal communication abilities. The role requires self-motivation and the capacity to thrive within a collaborative team environment, while maintain…

- Strong knowledge in SoC architecture and performance trade-offs in areas of cache coherency, caches, DDR, PCIe/CXL, Ethernet, and/or NoCs - Proficient at SW programming with good understanding of C/C++, Python, and modular object oriented software development - Knowledge of SystemVerilog and experience with simulators and waveform debugging tools (plus) - Experienced in SoC perf model development with good skills in performance analysis - Excellent skills in problem solving, written and verbal…

- In-depth knowledge of digital logic design, CPU/SOC architecture and microarchitecture - Sophisticated knowledge of SystemVerilog - Experienced level knowledge of C/C++ - Relevant knowledge of verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection - Basic knowledge of formal verification methodology (plus) - Excellent knowledge of one of the scripting languages such as Python, TCL (plus) - Excellent skills in problem solving, wr…

Candidates should possess 5-7 years of experience with clock methodology development for high-performance SoCs in advanced process nodes (7/5/3nm), along with experience in clock arch planning, clock tree synthesis flow, and implementing custom clocking solutions. Strong knowledge of clock tree quality metrics, clock verification, synthesis, place & route, STA, and Spice is required, alongside familiarity with CMOS circuit design, low power design, EM, IR, and top-level integration, and working …

Candidates should possess a Master’s Degree or Bachelor’s Degree with 3-5 years of experience, along with hands-on experience verifying digital logic portions of DDR/HBM memory subsystem designs. Knowledge of JEDEC specifications for LPDDRx/DDRx/HBMx and DDR DFI specifications and protocols is required, as is familiarity with Reliability, availability, and serviceability (RAS) features within memory subsystems.

Candidates should possess a Master’s Degree or Bachelor’s Degree with 3-5 years of experience in digital logic verification, specifically related to DDR/HBM memory subsystem designs. They must have hands-on experience verifying digital logic portions of memory subsystems and a strong understanding of JEDEC specifications for LPDDRx, DDRx, and HBMx. Knowledge of DDR DFI specification and protocol, as well as RAS features like error detection/correction and encryption, is also required.

Candidates should possess 5+ years of hands-on experience in bring-up and validation of complex SoCs, including experience scripting in Python or other programming languages and familiarity with object-oriented programming with C and C++. They should also have experience in bringing up silicons, performing functional and performance validation, and debugging failures, along with knowledge of common performance benchmarks such as MLPerf.

Candidates should possess a Bachelor’s degree plus 5 years of industry experience, or a Master’s degree plus 3 years of industry experience, or a Ph.D. with internship experience. Strong knowledge in SoC architecture and power/performance trade-offs is required, along with proficiency in SW programming with C/C++, Python, and modular object oriented software development. In-depth knowledge of memory subsystem architecture, microarchitecture, and design, including caches, cache coherency, NOC, LP…

Candidates should possess a Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field, and a minimum of 7 years of experience in a technical support or application engineering role, preferably with experience in GPGPU or CPU technologies. Strong technical proficiency is required, including a strong understanding of server and PC architecture, familiarity with board-level interfaces, knowledge of high-speed and high-power system design, board-level analog and d…

Candidates should have at least 3 years of experience in a customer-facing technical role, such as Field Application Engineering, Technical Support, or Solutions Engineering. They must possess a strong background in hardware-software co-design, embedded systems, or high-performance computing, along with proficiency in C/C++ and Python for debugging and scripting. Familiarity with computer architecture concepts, including CPUs, accelerators, memory subsystems, and interconnects, is also required.…