Silicon bringup and validation engineer at Rivos

Hsinchu, Hsinchu City, Taiwan

Rivos Logo
Not SpecifiedCompensation
Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level
Full TimeJob Type
UnknownVisa
SemiconductorIndustries

Requirements

  • In-depth knowledge of architecture, microarchitecture, and software interface of the subsystem
  • Experienced level knowledge of C/C++ and Python
  • Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation
  • Experience in silicon debug for logic, software, and physical issues
  • Strong ability to triage issues and develop environment and tools
  • Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
  • Ability to work well in a team and be productive under aggressive schedules
  • PhD, Master’s Degree or Bachelor’s Degree with more than 5 years of experience in technical subject area

Responsibilities

  • Lead an engineering team responsible for designing, implementing and executing a subsystem silicon bringup plans, including functional and performance tests, to validate the subsystem for the silicon product to meet the product requirements
  • Collaborate with cross-functional teams including design, architecture, firmware, and software to ensure successful subsystem integration and validation
  • Work with vendors and partners to ensure successful subsystem bringup and validation, including reviewing and providing feedback on vendor documentation, and coordinating with vendor support teams
  • Debug and root-cause issues found during subsystem bringup and validation, and work with cross-functional teams to implement corrective actions
  • Drive continuous improvement of subsystem bringup and validation processes and methodologies, including automation, tool development, and documentation
  • Maintain up-to-date knowledge of the subsystem technology and industry trends

Skills

C++
Python
Verilog
Emulation
Silicon Debug
SOC Bringup
SOC Validation
DDR
HBM
PCIe
CPU

Rivos

Develops custom RISC-V server solutions

About Rivos

Rivos develops high-performance and power-efficient server solutions using RISC-V, an open-source hardware instruction set architecture. Their custom hardware is designed to meet the specific needs of enterprise clients, including data centers and cloud service providers, who require reliable systems for extensive data processing and storage. Rivos stands out in the competitive server market by utilizing RISC-V technology, which allows for greater flexibility and customization compared to traditional proprietary solutions. This enables Rivos to offer tailored and cost-effective products. The company generates revenue by selling specialized servers and may also provide related services like hardware support and consulting. Rivos aims to address the unique demands of high-performance computing environments while ensuring security and efficiency.

Santa Clara, CaliforniaHeadquarters
2021Year Founded
$243.2MTotal Funding
SERIES_ACompany Stage
Consulting, Hardware, Enterprise SoftwareIndustries
201-500Employees

Benefits

Flexible Work Hours

Risks

Potential legal challenges from established chip manufacturers like Intel and AMD.
Pressure from investors for quick returns may affect long-term strategies.
Geopolitical risks from international expansion, such as opening an office in Taiwan.

Differentiation

Rivos leverages RISC-V for customizable, open-source server solutions.
Focus on power-efficient, high-performance servers sets Rivos apart in the data center market.
Rivos' development of an open software stack enhances its competitive edge.

Upsides

Growing interest in RISC-V boosts Rivos' market potential in AI and data analytics.
Energy-efficient computing trends align with Rivos' power-efficient server solutions.
Rivos' recent $250M funding supports expansion into AI and data analytics markets.

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