Post Silicon Validation Engineer
GroqFull Time
Mid-level (3 to 4 years), Senior (5 to 8 years)
Key technologies and capabilities for this role
Common questions about this position
This information is not specified in the job description.
This information is not specified in the job description.
Required skills include hands-on experience verifying DDR/HBM memory subsystems, knowledge of JEDEC specifications for LPDDRx/DDRx/HBMx, DDR DFI specification and protocol, and RAS features like error detection/correction and encryption. Proficiency in SystemVerilog/UVM for developing testbenches, stimulus, checkers, and scoreboards is also essential.
Rivos emphasizes building high-performance enterprise SOCs with leading performance, power, security, and RAS features. The role involves close collaboration with architects, design teams, 3rd party IP vendors, and global teams across continents.
A Master’s Degree or Bachelor’s Degree with 3-5 years of experience is required.
Develops custom RISC-V server solutions
Rivos develops high-performance and power-efficient server solutions using RISC-V, an open-source hardware instruction set architecture. Their custom hardware is designed to meet the specific needs of enterprise clients, including data centers and cloud service providers, who require reliable systems for extensive data processing and storage. Rivos stands out in the competitive server market by utilizing RISC-V technology, which allows for greater flexibility and customization compared to traditional proprietary solutions. This enables Rivos to offer tailored and cost-effective products. The company generates revenue by selling specialized servers and may also provide related services like hardware support and consulting. Rivos aims to address the unique demands of high-performance computing environments while ensuring security and efficiency.