Silicon ATE Test Engineer at Rivos

Hsinchu City, Hsinchu City, Taiwan

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Not SpecifiedCompensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductors, HPCIndustries

Requirements

Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
Minimum of 10-12 years of ATE experience developing test programs for server, client/mobile, or HPC products
Strong understanding of hardware design requirements (CPM/IBIS models, SI/PI simulation) for probe-card, load-board, burn-in boards
Hands-on experience with ATE test equipment (Advantest SMT8 preferred) writing Scan / Mbist / PHY tests, developing product binning test methods, secure manufacturing flows
Experience in leading a team of test engineers and managing OSATs highly desired
Prior DfT experience is highly desired
Bachelor’s or Master’s Degree in technical subject area

Responsibilities

Develop production, qualification, and characterization test programs for digital, analog, mixed-signal devices on ATE (Automatic Test Equipment) using Advantest 93K, Teradyne Uflex or other major test platforms
In charge of test pattern conversion and verification prior to silicon to ensure “First Time Right Vector” for smooth ATE bring-up
In charge of test hardware bring-up (probe card and load board) to meet the test specifications
Own First-Si test pattern bring-up, and collaborate with Product Engineering, DfT, and IC design to efficiently debug any failures and implement optimal solutions
Define test requirements & test limits, ensuring the correct levels of test coverage, and devise strategies to optimize test time
Drive ATE to System level correlation to implement relevant voltage guard-bands
Work cross functionally on failure analysis and debug during NPI phase and feedback to test strategy to ensure high quality standards

Skills

Key technologies and capabilities for this role

Advantest 93KTeradyne UflexAdvantest SMT8Scan testsMBISTPHY testsDfTProbe cardLoad boardATE test equipmentSI/PI simulationIBIS modelsTest pattern conversion

Questions & Answers

Common questions about this position

What salary is offered for this Silicon ATE Test Engineer position?

This information is not specified in the job description.

Is this a remote position or does it require on-site work?

This information is not specified in the job description.

What are the key required skills for this role?

Candidates need a minimum of 10-12 years of ATE experience developing test programs for server, client/mobile, or HPC products, hands-on experience with ATE test equipment like Advantest SMT8 writing Scan/Mbist/PHY tests, and strong understanding of hardware design requirements including CPM/IBIS models and SI/PI simulation.

What is the company culture or work environment like at Rivos?

This information is not specified in the job description.

What makes a strong candidate for this Sr. ATE Test Engineer role?

Strong candidates will have 10-12+ years of ATE experience, hands-on expertise with platforms like Advantest 93K or Teradyne Uflex, leadership experience managing test engineer teams and OSATs, plus prior DfT experience; excellent problem-solving, communication, and organizational skills are essential.

Rivos

Develops custom RISC-V server solutions

About Rivos

Rivos develops high-performance and power-efficient server solutions using RISC-V, an open-source hardware instruction set architecture. Their custom hardware is designed to meet the specific needs of enterprise clients, including data centers and cloud service providers, who require reliable systems for extensive data processing and storage. Rivos stands out in the competitive server market by utilizing RISC-V technology, which allows for greater flexibility and customization compared to traditional proprietary solutions. This enables Rivos to offer tailored and cost-effective products. The company generates revenue by selling specialized servers and may also provide related services like hardware support and consulting. Rivos aims to address the unique demands of high-performance computing environments while ensuring security and efficiency.

Santa Clara, CaliforniaHeadquarters

2021Year Founded

$243.2MTotal Funding

SERIES_ACompany Stage

Consulting, Hardware, Enterprise SoftwareIndustries

201-500Employees

Benefits

Flexible Work Hours

Risks

Potential legal challenges from established chip manufacturers like Intel and AMD.

Pressure from investors for quick returns may affect long-term strategies.

Geopolitical risks from international expansion, such as opening an office in Taiwan.

Differentiation

Rivos leverages RISC-V for customizable, open-source server solutions.

Focus on power-efficient, high-performance servers sets Rivos apart in the data center market.

Rivos' development of an open software stack enhances its competitive edge.

Upsides

Growing interest in RISC-V boosts Rivos' market potential in AI and data analytics.

Energy-efficient computing trends align with Rivos' power-efficient server solutions.

Rivos' recent $250M funding supports expansion into AI and data analytics markets.

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