Sr. Physical Design Engineer
GroqFull Time
Senior (5 to 8 years)
Key technologies and capabilities for this role
Common questions about this position
Yes, this is a remote position.
This information is not specified in the job description.
The role requires 5-7 years of experience with clock methodology development for high performance SoCs in advanced process nodes (7/5/3nm), experience with clock arch planning, clock tree synthesis flow, implementing custom clocking solutions, clock verification, synthesis, place & route, STA, Spice, strong knowledge of CMOS circuit design, low power design, scripting in TCL/Python, and excellent communication and problem-solving skills.
Rivos offers a fun, creative, and flexible work environment where you collaborate with talented and passionate engineers on cutting-edge Risc-V based SOC platforms, sharing a vision to build transformative products.
A BS with 7 years or MS with 5 years of relevant experience is required, along with demonstrated expertise in clock implementation for high-performance SoCs and strong cross-functional collaboration skills.
Develops custom RISC-V server solutions
Rivos develops high-performance and power-efficient server solutions using RISC-V, an open-source hardware instruction set architecture. Their custom hardware is designed to meet the specific needs of enterprise clients, including data centers and cloud service providers, who require reliable systems for extensive data processing and storage. Rivos stands out in the competitive server market by utilizing RISC-V technology, which allows for greater flexibility and customization compared to traditional proprietary solutions. This enables Rivos to offer tailored and cost-effective products. The company generates revenue by selling specialized servers and may also provide related services like hardware support and consulting. Rivos aims to address the unique demands of high-performance computing environments while ensuring security and efficiency.