Power Optimization Engineer at Etched.ai

Cupertino, California, United States

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Not SpecifiedCompensation

Senior (5 to 8 years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductors, Artificial IntelligenceIndustries

Requirements

Experience in power optimization using dynamic voltage and frequency scaling techniques, power aware synthesis, glitch power reduction techniques as well as efficient power delivery network implementation
Experience with gate-level power optimization through VCD-based and/or FSDB-based power analysis
Strong understanding of concepts of energy consumption, estimation, data movement, low power design, and power-saving features
Digital design and optimization using industry-standard power analysis tools and methodologies
Leading power optimization at RTL and layout level using PrimePower, VCD-based analysis, DVFS, clock power reduction, clock gating, and glitch reduction techniques

Responsibilities

Develop chip power model from chip architecture, estimate chip power from microarchitecture, and devise power saving techniques for product use cases
Work closely with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to implement design for optimal power using advanced power management techniques
Estimate and analyze power consumption data at both full-chip and unit levels, guiding ASIC teams to enhance the power efficiency of all functional units both pre-silicon and post silicon. Correlate the estimated power consumption to the measured power

Skills

DVFS

power aware synthesis

glitch power reduction

VCD analysis

FSDB analysis

PrimePower

RTL optimization

clock gating

power delivery network

power estimation

Etched.ai

Develops servers for transformer inference

About Etched.ai

The company specializes in developing powerful servers for transformer inference, utilizing transformer architecture integrated into their chips to achieve highly efficient and advanced technology. The main technologies used in the product are transformer architecture and advanced chip integration.

Cupertino, CA, USAHeadquarters

2022Year Founded

$5.4MTotal Funding

SEEDCompany Stage

HardwareIndustries

11-50Employees