Physical Design - STA at Tenstorrent

United States

Tenstorrent Logo
Not SpecifiedCompensation
Senior (5 to 8 years)Experience Level
Full TimeJob Type
UnknownVisa
Semiconductors, AIIndustries

Requirements

  • 7+ years of industry experience and a proven record of successful tapeouts
  • Deep knowledge of STA tools and techniques, including noise, crosstalk, and OCV analysis
  • Proficiency in writing and debugging SDC constraints, creating ECOs, and developing closure strategies
  • Strong scripting skills in Python, Perl, and TCL to support automation and flow development
  • Familiarity with SPICE modeling and worst-case corner analysis
  • Experienced in STA and passionate about enabling silicon to meet aggressive performance goals
  • Analytical and detail-oriented, with a strong understanding of timing paths, constraints, and optimization strategies
  • A collaborative team player who works well across logic, DFT, and physical design boundaries
  • Resourceful and self-driven, capable of developing scripts and methodologies that improve timing closure workflows
  • Compliance with U.S. Export Control laws (citizenship/permanent residency, asylee, or refugee status may be required)

Responsibilities

  • Drive static timing analysis and closure for complex, high-performance designs
  • Collaborate closely with logic, DFT, and physical design teams to debug constraints, optimize paths, and ensure chips meet performance targets across corners and modes

Skills

Key technologies and capabilities for this role

STAStatic Timing AnalysisSDCOCV analysiscrosstalk analysisnoise analysistiming closurephysical designDFTtiming constraintstiming optimizationRISC-V

Questions & Answers

Common questions about this position

What is the salary range for this position?

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets, with the actual offer impacted by experience, skills, education, background, and location.

Is this role remote or office-based?

This role is hybrid, based out of Austin, TX or Santa Clara, CA.

What skills are required for the Timing Engineer role?

The role requires 7+ years of industry experience with proven tapeouts, deep knowledge of STA tools including noise, crosstalk, and OCV analysis, proficiency in SDC constraints, ECOs, closure strategies, strong scripting in Python, Perl, and TCL, and familiarity with SPICE modeling and worst-case corner analysis.

What is the company culture like at Tenstorrent?

Tenstorrent values collaboration, curiosity, and a commitment to solving hard problems, with a diverse team passionate about AI and building high-performance RISC-V CPUs.

What makes a strong candidate for this role?

Strong candidates have experience in STA, are analytical and detail-oriented with strong understanding of timing paths and constraints, collaborative across teams, and resourceful with scripting skills; candidates at various experience levels are welcome and will be assessed during interviews.

Tenstorrent

Builds advanced computers for AI applications

About Tenstorrent

Tenstorrent builds advanced computers specifically designed for artificial intelligence applications. Their products include high-performance computing systems that utilize specialized hardware and software solutions, leveraging technologies like ASIC design and RISC-V architecture. Unlike many competitors, Tenstorrent focuses on integrating neural network compilers into their systems, enhancing the efficiency of AI computations. The company's goal is to advance the capabilities of AI computing, serving clients in the AI and computing sectors while generating revenue through the sale of their specialized systems and services.

Toronto, CanadaHeadquarters
2016Year Founded
$1,297.7MTotal Funding
SERIES_DCompany Stage
Hardware, AI & Machine LearningIndustries
501-1,000Employees

Benefits

Hybrid Work Options

Risks

Competition from established AI hardware companies like Nvidia could impact market share.
Reliance on open-source software may delay product development timelines.
Geopolitical tensions in South Korea and Japan could disrupt Tenstorrent's supply chains.

Differentiation

Tenstorrent leverages RISC-V technology for flexible, open-source AI hardware solutions.
The company partners with BOS Semiconductors to develop next-gen automotive AI chips.
Tenstorrent's global presence includes offices in key tech hubs like Silicon Valley and Tokyo.

Upsides

RISC-V architecture's growth aligns with Tenstorrent's open-source AI software focus.
Automotive AI chip market growth offers lucrative opportunities for Tenstorrent's BOS partnership.
Increasing demand for HPC systems could expand Tenstorrent's reach beyond tech industries.

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