Analog Mixed Signal Design Engineer at Flux

San Francisco, California, United States

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$194,000 – $270,000Compensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductor, AI HardwareIndustries

Requirements

7+ years of production CMOS data-converter design, with at least two tape-outs running ≥ 20 GHz analog bandwidth
Deep knowledge of track-and-hold linearity, aperture-jitter minimisation, current-steering DAC glitch energy reduction, capacitor and device matching, and metastability-hard comparators
Proficiency with industry EDA flows: Cadence Virtuoso, SpectreRF / AFS RF, Verilog-A/AMS, EMX / HFSS for package + on-chip inductor modelling, and mixed-signal verification
Demonstrated ability to achieve < 100 fs rms aperture jitter, < 0.5 LSB DNL/INL (post-calibration), and low-ppm clock-to-data skew in silicon
Experience incorporating digital calibration engines (DSP or µ-controller-driven) for offset, gain, timing and element-mismatch correction
Solid grasp of supply-noise coupling, substrate isolation, ESD, latch-up, and advanced-node layout techniques (double patterning, EUV constraints, local interconnect)
Strong lab skills: high-speed AWG/BERT operation, FFT-based dynamic testing, de-embedding, and scripting (Python / MATLAB) for data reduction
Bachelor’s degree in Electrical Engineering or related field (Master’s / PhD preferred)
Excellent communication, cross-disciplinary collaboration, and a demonstrated ability to execute quickly in innovation-driven environments

Responsibilities

Define converter architectures that will deliver on the target of Analog bandwidth > 20 GHz
Design critical high-speed building blocks: bootstrapped or switch-linearised T/H, low-skew clock trees (< 50 fs rms aperture jitter), broadband input buffers, thermometer and binary-weighted current cells, dynamic element matching (DEM) and background calibration loops
Model and close performance using transistor-level and behavioural co-simulation (SpectreRF / AFS RF + Verilog-A/AMS), then drive post-layout extraction, EM/IR and thermal analysis to achieve first-silicon success
Collaborate with packaging, SerDes and PLL teams to co-design I/O impedance, ESD, supply isolation and on-interposer routing so converters integrate cleanly into multi-lane fabrics
Lead silicon bring-up: on-wafer static and dynamic tests, high-speed digitiser / AWG measurements, DNL/INL, static-power and jitter transfer characterisation; oversee production test pattern generation and built-in self-test (BIST) hooks
Mentor junior engineers, conduct rigorous design and layout reviews, and publish internal app-notes to disseminate best practices for GHz-class data-converter design
Track and inject into the team the latest advances in time-interleaving calibration, background mismatch correction, supply-noise tolerant reference generation and layout techniques

Skills

Key technologies and capabilities for this role

CMOSADCsDACsSpectreRFVerilog-AVerilog-AMST/Hclock treesbroadband buffersDEMcalibrationSerDesPLLEM/IR analysisBIST

Questions & Answers

Common questions about this position

What is the salary range for this Analog Mixed Signal Design Engineer position?

The salary range is $194K - $270K.

Is this role remote or onsite?

The position is onsite.

What skills and experience are required for this role?

Candidates need 7+ years of production CMOS data-converter design with at least two tape-outs running ≥ 20 GHz analog bandwidth, deep knowledge of track-and-hold linearity, aperture-jitter minimisation, and proficiency with Cadence Virtuoso, SpectreRF/AFS RF, and Verilog-A/AMS.

What does the team structure or mentorship look like in this role?

The role involves mentoring junior engineers, conducting design and layout reviews, and publishing internal app-notes to share best practices.

What makes a strong candidate for this Analog Design Engineer position?

A strong candidate has demonstrated silicon success with < 100 fs rms aperture jitter, < 0.5 LSB DNL/INL post-calibration, experience with digital calibration engines, and expertise in advanced-node layout techniques.

Flux

AI-powered platform for PCB design

About Flux

Flux.ai provides a platform for designing and building printed circuit boards (PCBs) within the electronic design automation (EDA) market. The platform features an AI-powered assistant named Copilot, which helps users streamline the PCB design process, making it more efficient. Users can sign up for free and access basic features, with the option to upgrade to premium subscription plans for additional services. This freemium model allows engineers, designers, and electronics enthusiasts to engage with the platform at their own pace. Flux.ai differentiates itself from competitors by integrating AI assistance directly into the design workflow, enhancing user experience and accessibility in PCB design.

San Francisco, CaliforniaHeadquarters

2019Year Founded

$11.7MTotal Funding

EARLY_VCCompany Stage

Hardware, Consumer Software, AI & Machine LearningIndustries

51-200Employees

Benefits

Remote Work Options

Risks

Over-reliance on AI designs may lead to quality control issues and vulnerabilities.

New features like Smart Vias may increase complexity, potentially confusing users.

Intense competition from GenAI tools like SnapMagic could divert users from Flux.

Differentiation

Flux offers the first AI-powered hardware design assistant integrated into a PCB tool.

Flux's Copilot provides personalized design recommendations, enhancing user experience and efficiency.

Smart Vias technology simplifies high-density PCB designs, setting Flux apart from competitors.

Upsides

Increased adoption of AI tools boosts demand for Flux's innovative design platform.

Remote work trends align with Flux's cloud-based SaaS model, enhancing collaboration.

Generative AI advancements create opportunities for Flux to lead in hardware design.

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