Senior ASIC Design Engineer
NVIDIA- Full Time
- Senior (5 to 8 years)
Candidates should possess a Bachelor’s or Master’s degree in Computer or Electrical Engineering, along with 5+ years of experience in ASIC/FPGA hardware design, verification, or EDA/CAD. Strong scripting skills in Python or PERL are required, and experience with meta-programming approaches and physical design methodologies would be beneficial.
The Senior Staff Design Automation Engineer will architect, develop, and deploy an innovative framework for automating the Groq silicon design flow, collaborating with the silicon design team to migrate the hardware codebase and deliver configuration-specific collateral. They will also investigate new methods to accelerate verification and physical design, leveraging AI/ML, and explore opportunities to align hardware, software, and production flows.
AI inference technology for scalable solutions
Groq specializes in AI inference technology, providing the Groq LPU™, which is known for its high compute speed, quality, and energy efficiency. The Groq LPU™ is designed to handle AI processing tasks quickly and effectively, making it suitable for both cloud and on-premises applications. Unlike many competitors, Groq's products are designed, fabricated, and assembled in North America, which helps maintain high standards of quality and performance. The company targets a variety of clients across different industries that require fast and efficient AI processing capabilities. Groq's goal is to deliver scalable AI inference solutions that meet the growing demands for rapid data processing in the AI and machine learning market.