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The role requires a minimum of 5 years’ experience in system-level board design, strong background in high-speed board design techniques, and knowledge of schematic capture and PCB layout tools from Cadence, Altium, and others.
The culture emphasizes innovation, trusted relationships with hyperscalers and the data center ecosystem, a dedicated Hardware Engineering team working alongside ASIC Engineering, and a proactive 'do what it takes' attitude to solve problems and drive product improvements.
A strong candidate has a Bachelor’s in EE (Master’s preferred), at least 5 years of system-level board design experience, expertise in high-speed board design for data centers, proficiency with Cadence and Altium tools, innovative thinking, and a proactive attitude.
Semiconductor connectivity solutions for AI infrastructure
Astera Labs provides semiconductor-based connectivity solutions aimed at improving the performance of cloud and artificial intelligence (AI) infrastructure. Their products, which include PCIe, CXL, and Ethernet solutions, are designed to facilitate high-speed data transfer, addressing the 'memory wall' issue that can limit computing performance. The company serves clients in the growing cloud AI market, including data centers and businesses that depend on AI and cloud applications. Unlike many competitors, Astera Labs has been recognized for its contributions to the semiconductor industry, being a finalist for the Global Semiconductor Alliance's Most Respected Private Semiconductor Company award. The goal of Astera Labs is to enhance the efficiency and speed of data transfer in modern computing environments, positioning itself as a leader in the semiconductor sector.