Principal Engineering Program Manager (EPM) at Astera Labs

San Jose, California, United States

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Not SpecifiedCompensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductor, AI InfrastructureIndustries

Requirements

Bachelors’ or Masters’ Degree in Electronics/Electrical/Computer Engineering
10 or more years of relevant ASIC product experience in an electronics product or semiconductor company
Proficiency in ASIC development workflow including hands-on experience in one or more of the following domains: Architecture, RTL/Analog design, Design Verification, Physical Design, Layout, post-silicon Validation/Characterization, Product or Test Engineering
Experience in solving technical problems in pre-silicon or post-silicon environment
5 or more years of experience as an ASIC Program Manager, PMP certification is a plus
Experience building new ASIC products in advanced technology nodes (< 10 nm)
Experience working on ASICs for PCI-E, memory or data communication products is a plus
Technical appreciation of ASIC engineering flows (front end and backend development processes, product and test engineering, char and validation, hardware/firmware/software design)
Program management and analytical skills, ability to organize information for internal and external consumption
Working knowledge of Microsoft Project, Atlassian Tools and JIRA Scrum Methodologies as well as using work breakdown structure to identify objectives and milestones
Able to motivate and energize teams and lead by influence in a matrixed organization
Able to take timely decisions with limited or incomplete information
Strong communication skills and the ability to keep calm and make progress in high stress situations
Ability to travel to Astera Labs’ sites as required

Responsibilities

Be the point of contact within Astera for all matters relating to ASIC programs
Own the on-time, on-spec, on-budget and with high-quality delivery of ASIC products from concept through production (architecture, RTL design, verification, physical design, tapeout, validation, customer evaluation, qualification, RTM)
Program planning, schedules, budgeting, risk assessment, resource planning and management, and tracking related program activities
Review, disposition and communicate changes in scope / schedule / expense
Conduct regular meetings to ensure cross-functional teams are clear on expectations and problem-solving actions are in place to address issues in a timely manner
Maintain adequate technical depth and managerial skill to address program and product issues
Be the champion of your programs and maintain management and key stakeholder alignment
Collaborate with the team to ensure customer expectations are exceeded
Actively contribute to organizational development and process improvement initiatives

Skills

ASIC

NPI

RTM

RTL Design

Verification

Physical Design

Tapeout

Validation

Program Management

Risk Assessment

Resource Planning

Cross-Functional Leadership

CXL

PCIe

Ethernet

Astera Labs

Semiconductor connectivity solutions for AI infrastructure

About Astera Labs

Astera Labs provides semiconductor-based connectivity solutions aimed at improving the performance of cloud and artificial intelligence (AI) infrastructure. Their products, which include PCIe, CXL, and Ethernet solutions, are designed to facilitate high-speed data transfer, addressing the 'memory wall' issue that can limit computing performance. The company serves clients in the growing cloud AI market, including data centers and businesses that depend on AI and cloud applications. Unlike many competitors, Astera Labs has been recognized for its contributions to the semiconductor industry, being a finalist for the Global Semiconductor Alliance's Most Respected Private Semiconductor Company award. The goal of Astera Labs is to enhance the efficiency and speed of data transfer in modern computing environments, positioning itself as a leader in the semiconductor sector.

Santa Clara, CaliforniaHeadquarters

2017Year Founded

$200.8MTotal Funding

IPOCompany Stage

Data & Analytics, Hardware, AI & Machine LearningIndustries

201-500Employees

Risks

Rapid office expansion could lead to financial strain if growth in demand falters.

Foray into biotechnology may divert resources from core semiconductor business.

Reliance on Nvidia partnership poses risk if strategic focus shifts or partnership disrupts.

Differentiation

Astera Labs offers the industry's first PCIe 6 switch, Scorpio, for AI infrastructure.

The company focuses on overcoming the 'memory wall' in high-speed data transfer solutions.

Astera Labs integrates AI with biotechnology, diversifying beyond traditional semiconductor applications.

Upsides

Astera Labs' relocation to San Jose triples its operational capacity and talent acquisition.

Strategic partnership with Nvidia enhances Astera Labs' credibility in AI and semiconductor markets.

Recent investments from major financial entities indicate strong investor confidence in growth.

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