Joel's Job
AshbyFull Time
Entry Level & New Grad, Junior (1 to 2 years)
Candidates must have 8+ years of experience in DFT engineering and a Bachelor's or Master's degree. Strong understanding of DFT, ATPG, JTAG, and MBIST, along with proven experience in developing DFT specifications and architectures, is required. Expertise in debugging DFT issues, proficiency in Cadence tools like Modus and Genus, and efficient TCL scripting skills are essential. Ability to conduct experiments during silicon debug and analyze data is also necessary.
The DFT Engineer will develop and implement DFT architectures and infrastructure, including scan chains and BIST. They will generate test vectors, analyze DFT coverage, and verify test patterns using gate-level simulations. Responsibilities also include collaborating with STA, physical design, and power engineers for debugging DFT-related problems and partnering with test engineers for silicon bring-up and testing.
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