Design Verification Engineer - External IP at Etched.ai

San Jose, California, United States

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$150,000 – $275,000Compensation

Senior (5 to 8 years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductors, Artificial IntelligenceIndustries

Requirements

5+ years of design verification experience
Enjoy digging deep into complex verification challenges and finding creative ways to expose corner-case bugs
Hands-on experience with industry-standard verification methodologies like SystemVerilog/UVM and understand how to build scalable, reusable testbenches
Comfortable working with standard IP interfaces and protocols such as PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs
Thrive in a fast-paced startup environment and can take ownership of projects with minimal direction
Collaborate naturally with cross-functional teams — from RTL design to software and emulation — and can clearly communicate technical insights

Responsibilities

End to end ownership of one or more of the following IP’s: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors
Understand vendor IP configurations and handle handshake with internal IP team
Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications
Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture
Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios

Skills

Key technologies and capabilities for this role

SystemVerilogUVMPCIeEthernetARMARCRTLSoC verificationcoverage closure

Questions & Answers

Common questions about this position

What is the salary range for the Design Verification Engineer position?

The salary range is $150K - $275K.

Is this position remote or onsite?

This is an onsite position.

What are the must-have skills for this role?

Must-have qualifications include 5+ years of design verification experience, hands-on experience with SystemVerilog/UVM for building scalable testbenches, comfort with IP interfaces like PCIe, Ethernet, AXI/AMBA, or ARM/ARC CPUs, and the ability to thrive in a fast-paced startup while collaborating cross-functionally.

What benefits does Etched offer?

Benefits include full medical, dental, and vision packages with generous premium coverage, a $2,000/month housing subsidy for those living within walking distance of the office, daily lunch and dinner in the office, and relocation support for those moving to San Jose (Santana Row).

What makes a strong candidate for this Design Verification Engineer role?

Strong candidates have 5+ years of DV experience, enjoy tackling complex verification challenges creatively, hands-on SystemVerilog/UVM expertise, familiarity with IP protocols like PCIe and Ethernet, and the ability to own projects in a fast-paced startup while collaborating across teams; nice-to-haves include vendor handling and IP integration experience.

Etched.ai

Develops servers for transformer inference

About Etched.ai

The company specializes in developing powerful servers for transformer inference, utilizing transformer architecture integrated into their chips to achieve highly efficient and advanced technology. The main technologies used in the product are transformer architecture and advanced chip integration.

Cupertino, CA, USAHeadquarters

2022Year Founded

$5.4MTotal Funding

SEEDCompany Stage

HardwareIndustries

11-50Employees