Sr. ASIC Design Verification Engineer
GroqFull Time
Senior (5 to 8 years)
Key technologies and capabilities for this role
Common questions about this position
Compensation ranges from $100k - $500k, including base and variable compensation targets, depending on experience, skills, education, background, and location.
The position is hybrid and based in either Austin, TX or Santa Clara, CA.
Candidates need at least 8 years of experience, a strong background in high-performance OOO CPU microarchitecture, experience with ISAs like x86, ARM, or RISC-V, proficiency in RTL/DV debugging, UVM-based stimulus, assembly, C/C++, scripting (Python, PERL), and HDLs like Verilog/VHDL.
Tenstorrent values collaboration, curiosity, and a commitment to solving hard problems, and they welcome contributors of all seniorities as they grow their team.
A strong candidate will have a BS/MS/PhD in EE/ECE/CE/CS, at least 8 years of experience, and strong problem-solving and debug skills, particularly in high-performance OOO CPU microarchitecture and related verification tools.
Builds advanced computers for AI applications
Tenstorrent builds advanced computers specifically designed for artificial intelligence applications. Their products include high-performance computing systems that utilize specialized hardware and software solutions, leveraging technologies like ASIC design and RISC-V architecture. Unlike many competitors, Tenstorrent focuses on integrating neural network compilers into their systems, enhancing the efficiency of AI computations. The company's goal is to advance the capabilities of AI computing, serving clients in the AI and computing sectors while generating revenue through the sale of their specialized systems and services.