CPU Core Design Verification Engineer - Contractor at Tenstorrent

United States

Tenstorrent Logo
$100,000 – $500,000Compensation
Senior (5 to 8 years)Experience Level
Full TimeJob Type
UnknownVisa
AI, SemiconductorsIndustries

Requirements

  • BS/MS/PhD in EE/ECE/CE/CS
  • At least 8 years of experience
  • Strong background and experience with high-performance OOO CPU microarchitecture
  • Experience and understanding of one or more ISAs - x86, ARM, or RISC-V
  • Experience debugging RTL and DV in a simulation environment, proficient at waveform and log file-based debug
  • Experienced with assembly, C/C++, and UVM-based stimulus generation targeting both ISA and microarchitectural scenarios
  • Familiar with simulation, formal, and emulation environments
  • Hands-on with scripting (Python, PERL)
  • Experience with hardware description languages (Verilog, VHDL) and simulators (VCS, NC, Verilator)
  • Strong problem-solving and debug skills across various levels of design hierarchies

Responsibilities

  • Functional verification with emphasis on core-level testplanning, stimulus development, and regression debug for simulation and emulation regressions
  • Understand ISA and microarchitectural specifications for the Core and create comprehensive testplans
  • Hands-on debug for core-level failures
  • Propose and implement stimulus enhancements and debug capability improvements for core, cluster, and chip-level testbench environments
  • Develop architectural and microarchitectural coverage for core features and create stimulus for closing coverage in a timely manner
  • Support design deployment across simulation and emulation platforms
  • Develop random and directed stimulus that spans pre-silicon, emulation, and post-silicon domains
  • Work with design, test, and post-silicon validation teams to ensure high-quality delivery of the entire CPU core / cluster

Skills

Key technologies and capabilities for this role

UVMRTLx86ARMRISC-VC/C++AssemblyOOO CPUmicroarchitecturefunctional verificationtestplanningstimulus generationsimulationemulationregression debug

Questions & Answers

Common questions about this position

What is the salary range for this position?

Compensation ranges from $100k - $500k, including base and variable compensation targets, depending on experience, skills, education, background, and location.

Is this role remote or hybrid, and where is it located?

The position is hybrid and based in either Austin, TX or Santa Clara, CA.

What are the key skills and experience required for this role?

Candidates need at least 8 years of experience, a strong background in high-performance OOO CPU microarchitecture, experience with ISAs like x86, ARM, or RISC-V, proficiency in RTL/DV debugging, UVM-based stimulus, assembly, C/C++, scripting (Python, PERL), and HDLs like Verilog/VHDL.

What is the company culture like at Tenstorrent?

Tenstorrent values collaboration, curiosity, and a commitment to solving hard problems, and they welcome contributors of all seniorities as they grow their team.

What makes a strong candidate for this CPU Core Design Verification Engineer role?

A strong candidate will have a BS/MS/PhD in EE/ECE/CE/CS, at least 8 years of experience, and strong problem-solving and debug skills, particularly in high-performance OOO CPU microarchitecture and related verification tools.

Tenstorrent

Builds advanced computers for AI applications

About Tenstorrent

Tenstorrent builds advanced computers specifically designed for artificial intelligence applications. Their products include high-performance computing systems that utilize specialized hardware and software solutions, leveraging technologies like ASIC design and RISC-V architecture. Unlike many competitors, Tenstorrent focuses on integrating neural network compilers into their systems, enhancing the efficiency of AI computations. The company's goal is to advance the capabilities of AI computing, serving clients in the AI and computing sectors while generating revenue through the sale of their specialized systems and services.

Toronto, CanadaHeadquarters
2016Year Founded
$1,297.7MTotal Funding
SERIES_DCompany Stage
Hardware, AI & Machine LearningIndustries
501-1,000Employees

Benefits

Hybrid Work Options

Risks

Competition from established AI hardware companies like Nvidia could impact market share.
Reliance on open-source software may delay product development timelines.
Geopolitical tensions in South Korea and Japan could disrupt Tenstorrent's supply chains.

Differentiation

Tenstorrent leverages RISC-V technology for flexible, open-source AI hardware solutions.
The company partners with BOS Semiconductors to develop next-gen automotive AI chips.
Tenstorrent's global presence includes offices in key tech hubs like Silicon Valley and Tokyo.

Upsides

RISC-V architecture's growth aligns with Tenstorrent's open-source AI software focus.
Automotive AI chip market growth offers lucrative opportunities for Tenstorrent's BOS partnership.
Increasing demand for HPC systems could expand Tenstorrent's reach beyond tech industries.

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