Sr. ASIC Design Verification Engineer
GroqFull Time
Senior (5 to 8 years)
Key technologies and capabilities for this role
Common questions about this position
Candidates need an Electrical Engineering B.Sc., Computer Engineering or other relevant engineering degree, or equivalent experience, plus 2+ years of experience in RTL verification.
The role involves working in a combined design and verification team developing front-end design for Switch silicon GPU and HCA, handling chip level integrations and connectivity, and collaborating with teams like Architecture, Micro-Architecture, and FW.
Knowledge in Specman, Verilog, and a background in Networking are ways to stand out from the crowd.
You'll work in a meaningful, growing, and highly professional environment with a combined design and verification team, interacting with organization-wide groups in a technology-focused company.
NVIDIA seeks self-motivated individuals who can work independently, drive tasks to completion, and are team players with good communication and interpersonal skills.
Designs GPUs and AI computing solutions
NVIDIA designs and manufactures graphics processing units (GPUs) and system on a chip units (SoCs) for various markets, including gaming, professional visualization, data centers, and automotive. Their products include GPUs tailored for gaming and professional use, as well as platforms for artificial intelligence (AI) and high-performance computing (HPC) that cater to developers, data scientists, and IT administrators. NVIDIA generates revenue through the sale of hardware, software solutions, and cloud-based services, such as NVIDIA CloudXR and NGC, which enhance experiences in AI, machine learning, and computer vision. What sets NVIDIA apart from competitors is its strong focus on research and development, allowing it to maintain a leadership position in a competitive market. The company's goal is to drive innovation and provide advanced solutions that meet the needs of a diverse clientele, including gamers, researchers, and enterprises.