Silicon Design Engineer (Power Technical Lead) at Altera

The salary range is $178.9k - $259.0k USD for Bay Area California only, with actual salary varying based on factors like job location, knowledge, skills, experiences, and trainings. Incentive opportunities are also offered based on individual and company performance.

This information is not specified in the job description.

Candidates need 10+ years of hands-on hardware design experience, including power optimization over the full product cycle, low power circuit design, timing sign-off analysis, power optimization techniques like clock-gating and power-gating, and power-related EDA tools such as PTPX, Redhawk, and Power Artist. Familiarity with PrimeTime, Design Compiler, PnR, UPF is also required, along with a Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

You'll join the Power and Performance Team, surrounded by some of the brightest minds, working across the Altera Engineering team to achieve Performance per Watt leadership. The role involves close collaboration with cross-functional teams like Architecture, Design, Planning, Package, and Platform.

Stand out with 15+ years of hardware design experience, post-silicon power correlation, FPGA and related EDA tools like Quartus/Vivado, flow or tool development using Python/Perl/Tcl, or a Master’s or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.