Senior Staff, Serdes DSP Design at Samsung Austin Semiconductor

San Jose, California, United States

Samsung Austin Semiconductor Logo
Not SpecifiedCompensation
Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level
Full TimeJob Type
UnknownVisa
Semiconductor, TechnologyIndustries

Requirements

  • Bachelors with 15+ years of relevant industry experience, or Masters with 13+ years or PhDs with 10+ years of experience in high speed Serdes DSP design
  • 10+ years of industrial experience specialized in SerDes DSP and digital/logical PHY design
  • Proficient with Verilog-HDL/System Verilog coding for PAM4/PAM6 DSP based SerDes including link-training, analog circuits and ADC foreground/background calibration and adaptation
  • Deep understanding of high-speed serial interconnect architectures such as PCIe, 100/200Gbps per lane ethernet and design trade-offs
  • RTL logic design, debug and functional verification experience
  • Experience in synthesis, CDC, static timing analysis
  • Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow
  • Deep understanding of Signal Integrity and Power Integrity modeling for High Speed designs
  • Understanding of micro architecture with standard peripherals such as AMBA BUS, I2C, SPI and UART
  • Understanding of design for testability (DFT) flow
  • Thorough understanding of the end-to-end digital design flow to collaborate with system and analog team
  • Daily onsite presence at San Jose, CA headquarters

Responsibilities

  • Focused on digital DSP design for high speed Serdes

Skills

Key technologies and capabilities for this role

SerDesDSP DesignVerilog-HDLSystemVerilogPAM4PAM6Digital PHYHDL Coding

Questions & Answers

Common questions about this position

What experience level is required for this Senior Staff Serdes DSP Design role?

Candidates need a Bachelor's with 15+ years, Master's with 13+ years, or PhD with 10+ years of relevant industry experience in high speed Serdes DSP design.

Is this position remote or onsite?

The role requires daily onsite presence at the San Jose, CA headquarters in alignment with the Flexible Work policy.

What key technical skills are needed for this job?

Proficiency in Verilog-HDL/System Verilog for PAM4/PAM6 DSP SerDes, RTL logic design, synthesis, CDC, static timing analysis, and deep understanding of high-speed serial interconnects like PCIe and Ethernet are required.

What is the company culture like at Samsung Semiconductor?

The company emphasizes an inclusive culture, diverse workforce, commitment to learning and growth, and excelling in collaboration within and across teams.

What makes a strong candidate for this Serdes DSP Design position?

Ideal candidates have 10+ years specialized in SerDes DSP and digital/logical PHY design, with thorough understanding of end-to-end digital design flow for collaboration with system and analog teams.

Samsung Austin Semiconductor

Develops advanced semiconductor technology solutions

About Samsung Austin Semiconductor

Samsung Semiconductor specializes in cutting-edge semiconductor technologies, offering ultra-high resolution sensors, ultra-fine pixel technology, gaming storage, automotive memory solutions, AI advancements, and EUV advanced processing, providing transformative solutions for device manufacturers.

Laxmi Sagar Layout, Mahadevapura, Bengaluru, Karnataka 560048, IndiaHeadquarters
N/AYear Founded
VENTURE_UNKNOWNCompany Stage
Hardware, Consumer SoftwareIndustries
5,001-10,000Employees

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