Senior / Staff Digital Design Engineer at Flux

San Francisco, California, United States

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$194,000 – $270,000Compensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductor, AI HardwareIndustries

Requirements

7+ years of hands-on digital design for high-performance ASICs or SoCs, including ownership of at least one product that processes a continuous real-time data stream
Proven success closing timing on multi-hundred-MHz to multi-GHz clock domains and integrating high-speed IP (e.g., SerDes, HBM/DDR, PCIe, 100 GbE or similar)
Expertise with industry-standard EDA flows: RTL synthesis, CDC/RDC, STA, power-intent (UPF/CPF), lint, and gate-level simulation
Demonstrated FPGA prototyping skills: constraint management, transceiver tuning, and hardware debug in the lab
Proficiency using MATLAB/Simulink or Python/NumPy for algorithm modelling, fixed-point analysis and test-vector generation
Solid grounding in digital signal-processing concepts, computer-architecture fundamentals and semiconductor device physics
Excellent communication and cross-functional collaboration abilities; thrives in a fast-moving, ambiguous environment
Strong background in electrical engineering and semiconductor physics
Passion for developing reliable, high-performance digital circuits that drive breakthrough AI hardware

Responsibilities

Architect, design and implement high-throughput digital pipelines (multi-GSPS input rate, continuous streaming data paths, deep pipelining and hand-shaking) in advanced CMOS nodes
Prototype and iterate rapidly in FPGA (Xilinx/AMD, Intel, or equivalent): bring-up real-time demos, exercise high-speed transceivers, and feed learnings back into the ASIC
Model algorithms and validate concepts in MATLAB/Simulink (or equivalent), ensuring functional equivalence through to gate-level sign-off
Own RTL development (SystemVerilog / Verilog / VHDL) including synthesis, static-timing closure, formal and constrained-random verification
Analyse power, performance and area (PPA); implement innovative techniques to achieve aggressive bandwidth-per-watt targets
Collaborate with optical-hardware, mixed-signal and software teams to optimise data-converter interfaces, clock-domain crossings and firmware abstractions
Mentor junior engineers, lead design reviews and champion best-practice design methodologies
Take end-to-end ownership of high-speed, real-time data-processing silicon—from early algorithm modelling to verified RTL and silicon bring-up

Skills

Key technologies and capabilities for this role

CMOSRTLSystemVerilogVerilogVHDLFPGAXilinxAMDIntelMATLABSimulinksynthesisstatic-timing closureformal verificationconstrained-random verificationPPA analysisclock-domain crossings

Questions & Answers

Common questions about this position

What is the salary range for this position?

The salary range is $194,000 – $270,000.

Is this role remote or onsite?

This is an onsite position.

What key skills and experience are required for this role?

Candidates need 7+ years of hands-on digital design for high-performance ASICs or SoCs, proven success closing timing on multi-hundred-MHz to multi-GHz clock domains, expertise with EDA flows including RTL synthesis and STA, FPGA prototyping skills, and proficiency in MATLAB/Simulink or Python for algorithm modeling.

What is the team environment like at Flux?

You will join a multidisciplinary group creating next-generation OTPUs where digital, optical and mixed-signal domains intersect, collaborating with optical-hardware, mixed-signal and software teams in a fast-moving, ambiguous environment.

What makes a strong candidate for this Senior/Staff Digital Design Engineer role?

A strong candidate has 7+ years of ASIC/SoC digital design experience with ownership of real-time data stream products, expertise in high-speed IP integration and EDA flows, FPGA prototyping skills, and excellent cross-functional collaboration abilities; nice-to-haves include tape-out at 22nm or below and AI/ML workload knowledge.

Flux

AI-powered platform for PCB design

About Flux

Flux.ai provides a platform for designing and building printed circuit boards (PCBs) within the electronic design automation (EDA) market. The platform features an AI-powered assistant named Copilot, which helps users streamline the PCB design process, making it more efficient. Users can sign up for free and access basic features, with the option to upgrade to premium subscription plans for additional services. This freemium model allows engineers, designers, and electronics enthusiasts to engage with the platform at their own pace. Flux.ai differentiates itself from competitors by integrating AI assistance directly into the design workflow, enhancing user experience and accessibility in PCB design.

San Francisco, CaliforniaHeadquarters

2019Year Founded

$11.7MTotal Funding

EARLY_VCCompany Stage

Hardware, Consumer Software, AI & Machine LearningIndustries

51-200Employees

Benefits

Remote Work Options

Risks

Over-reliance on AI designs may lead to quality control issues and vulnerabilities.

New features like Smart Vias may increase complexity, potentially confusing users.

Intense competition from GenAI tools like SnapMagic could divert users from Flux.

Differentiation

Flux offers the first AI-powered hardware design assistant integrated into a PCB tool.

Flux's Copilot provides personalized design recommendations, enhancing user experience and efficiency.

Smart Vias technology simplifies high-density PCB designs, setting Flux apart from competitors.

Upsides

Increased adoption of AI tools boosts demand for Flux's innovative design platform.

Remote work trends align with Flux's cloud-based SaaS model, enhancing collaboration.

Generative AI advancements create opportunities for Flux to lead in hardware design.

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