Senior ASIC Design Engineer
NVIDIA- Full Time
- Senior (5 to 8 years)
Candidates must possess a Bachelor’s degree in Electrical Engineering or a related field, or equivalent practical experience, with a minimum of 10 years of design verification experience in building testbenches, environments, and design verification processes; advanced degrees (Master’s or PhD) are considered a plus. Strong analytical and problem-solving abilities, keen attention to detail, and the ability to effectively prioritize and execute tasks in a high-pressure environment are also required.
The Senior Staff ASIC Design Verification Engineer will verify hardware features of Language Process Units (LPUs), collaborate within the Hardware Team to design and verify features on LPU chips using simulation, emulation, and silicon, develop and implement advanced verification environments and methodologies, implement and optimize automated verification flows, utilize formal verification techniques, support silicon bring-up and debug, be a productivity multiplier by contributing to engineering best practices, and innovate by developing future verification strategies for validating future accelerator chips and hardware architectures for ML workloads.
AI inference technology for scalable solutions
Groq specializes in AI inference technology, providing the Groq LPU™, which is known for its high compute speed, quality, and energy efficiency. The Groq LPU™ is designed to handle AI processing tasks quickly and effectively, making it suitable for both cloud and on-premises applications. Unlike many competitors, Groq's products are designed, fabricated, and assembled in North America, which helps maintain high standards of quality and performance. The company targets a variety of clients across different industries that require fast and efficient AI processing capabilities. Groq's goal is to deliver scalable AI inference solutions that meet the growing demands for rapid data processing in the AI and machine learning market.