Sr. ASIC Design Verification Engineer
GroqSalary not specified
Full Time
Senior (5 to 8 years)
Not SpecifiedCompensation
Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level
Full TimeJob Type
UnknownVisa
Semiconductors, AI Hardware, Photonic TechnologyIndustries
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- Minimum of 8+ years of ASIC/SOC digital design experience and 3+ years of people management experience
- Excellent leadership, communication, team building and stakeholder management skills
- Ability to coordinate across multiple projects, manage risks and escalations, and work under tight schedules and budget constraints
- Strong knowledge across the full ASIC/SOC development cycle from microarchitecture development to tape-out in advanced process technologies
- Outstanding technical expertise in microarchitecture development
Responsibilities
- Lead a team of high performing ASIC design engineers responsible for RTL design of IPs, subsystems and SOCs supporting Celestial AI’s photonic fabric roadmap
- Develop project schedules, define milestones, allocate resources, manage budgets and ensure timely delivery of high-quality designs that meet product functional and performance goals
- Provide technical leadership in defining IP/SOC microarchitecture specifications, and design methodologies. Conduct design reviews to ensure adherence to best practices
- Guide the team in optimizing the design to meet aggressive performance, power and area goals using advanced architectural and design techniques
- Drive effective and seamless collaboration with partner teams across architecture, verification, physical design, firmware, DFT, and post silicon domains to ensure successful system level functionality
- Mentor the team, foster a culture of continuous learning and actively help with career development
- Interface with external IP vendors, foundries and EDA tool providers to ensure dependencies and roadblocks are addressed in timely fashion to support team deliverables
Skills
Key technologies and capabilities for this role
Questions & Answers
Common questions about this position
What are the main responsibilities of the Senior Manager, ASIC Design role?
The role involves leading a team of ASIC design engineers for RTL design of IPs, subsystems, and SOCs, developing project schedules, managing resources and budgets, providing technical leadership in microarchitecture and design methodologies, optimizing designs for performance, power, and area, and driving collaboration with partner teams.
What skills and experience are required for this position?
The role requires proven technical expertise in advanced ASIC design flows, leadership in execution, scheduling, cross-functional coordination, RTL design of IPs, subsystems and SOCs, defining microarchitecture specifications, design methodologies, and optimizing for performance, power, and area goals.
Is this a remote position or does it require office work?
This information is not specified in the job description.
What is the salary or compensation for this role?
This information is not specified in the job description.
Who does this role report to and what kind of team will I manage?
The role reports to the Senior Director, ASIC Engineering, and involves managing a team of high performing ASIC design engineers.
Celestial AI
Optical interconnects for high-performance computing
About Celestial AI
Celestial AI focuses on high-performance computing for hyperscale data centers with its technology called Photonic Fabric™, an optical compute interconnect. This technology reduces DRAM requirements by up to 35% and lowers power consumption while increasing bandwidth capacity, which is essential for multi-tenant cloud environments. Additionally, it allows for the disaggregation of High Bandwidth Memory (HBM) using optics instead of traditional connections. The goal is to provide optical connectivity that supports advancements in Generative AI and complex workloads.
Sunnyvale, CaliforniaHeadquarters
2020Year Founded
$329.6MTotal Funding
SERIES_CCompany Stage
Data & Analytics, Hardware, AI & Machine LearningIndustries
51-200Employees
Benefits
Health Insurance
Vision Insurance
Dental Insurance
Life Insurance
Company Equity
Risks
Emerging competition from companies like Lightmatter and Ayar Labs.
Potential integration challenges with existing data center infrastructure.
Dependency on limited suppliers for photonic components poses supply chain risks.
Differentiation
Celestial AI's Photonic Fabric™ offers unique optical compute interconnect technology.
The company reduces DRAM requirements by up to 35%, saving billions annually.
Celestial AI enables disaggregation of HBM over optics, enhancing bandwidth capacity.
Upsides
Acquisition of Rockley Photonics' IP strengthens Celestial AI's competitive position.
$175 million Series C funding supports further innovation and market expansion.
Growing demand for energy-efficient solutions aligns with Celestial AI's sustainable focus.
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