Principal Emulation Engineer at Astera Labs

San Jose, California, United States

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Not SpecifiedCompensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductor, Networking, Storage, AIIndustries

Requirements

Strong academic and technical background in computer/electrical engineering (minimum Bachelor’s in EE or Computer Science; Master’s preferred)
≥8 years’ experience supporting or developing complex SoC/silicon products for Server, Storage or Networking applications
Experience working with logic designers to architect, specify, and verify hardware-software interfaces on complex SoCs
Professional attitude with the ability to prioritize a dynamic list of multiple tasks and work with minimal guidance and supervision
Entrepreneurial, open-mind behavior and can-do attitude with customer focus
Authorized to work in the US and able to start immediately
Working knowledge of PCIe, Ethernet, DDR, SPI, I2C/I3C or similar protocols
High level of proficiency in System Verilog and verification environments
Experience understanding software and hardware co-simulation limitations and debug methods
Experience in programming and scripting languages (like Perl/Python/C)
Currently based locally or open to relocation
Hands-on experience verifying protocols on complex ASICs and experience with or interest in emulation
Good knowledge of communication protocols such as PCI-Express (Gen-3 and above), DDR, Ethernet, NVMe, or similar interfaces

Responsibilities

Create environments to enable verification teams to stress test ASICs
Debug design, environment, transactor, and code issues

Skills

Key technologies and capabilities for this role

SystemVerilogPCIeEthernetDDRNVMeEmulationASIC VerificationSoCSPII2CI3C

Questions & Answers

Common questions about this position

What is the base salary range for the Principal Emulation Engineer position?

The base salary range is $209,000.00 USD – $230,000.00 USD, determined based on location, experience, and pay of employees in similar positions.

Is this position remote or does it require relocation?

Candidates must be currently based locally or open to relocation.

What are the required skills and experience for this role?

The role requires ≥8 years’ experience with complex SoC/silicon products, working knowledge of protocols like PCIe, Ethernet, DDR, SPI, I2C/I3C, proficiency in System Verilog and verification environments, and experience in programming/scripting languages like Perl/Python/C.

What is the company culture like at Astera Labs?

The company values entrepreneurial, open-minded behavior, a can-do attitude, thinking and acting fast with the customer in mind, and promotes diversity including people of color, LGBTQ+, veterans, parents, and individuals with disabilities.

What makes a strong candidate for this Principal Emulation Engineer role?

Strong candidates have hands-on experience verifying protocols on complex ASICs, creating environments for verification teams, debugging skills, a professional attitude with task prioritization, minimal supervision needs, and preferred experience in emulation technologies like Palladium/Zebu/Veloce.

Astera Labs

Semiconductor connectivity solutions for AI infrastructure

About Astera Labs

Astera Labs provides semiconductor-based connectivity solutions aimed at improving the performance of cloud and artificial intelligence (AI) infrastructure. Their products, which include PCIe, CXL, and Ethernet solutions, are designed to facilitate high-speed data transfer, addressing the 'memory wall' issue that can limit computing performance. The company serves clients in the growing cloud AI market, including data centers and businesses that depend on AI and cloud applications. Unlike many competitors, Astera Labs has been recognized for its contributions to the semiconductor industry, being a finalist for the Global Semiconductor Alliance's Most Respected Private Semiconductor Company award. The goal of Astera Labs is to enhance the efficiency and speed of data transfer in modern computing environments, positioning itself as a leader in the semiconductor sector.

Santa Clara, CaliforniaHeadquarters

2017Year Founded

$200.8MTotal Funding

IPOCompany Stage

Data & Analytics, Hardware, AI & Machine LearningIndustries

201-500Employees

Risks

Rapid office expansion could lead to financial strain if growth in demand falters.

Foray into biotechnology may divert resources from core semiconductor business.

Reliance on Nvidia partnership poses risk if strategic focus shifts or partnership disrupts.

Differentiation

Astera Labs offers the industry's first PCIe 6 switch, Scorpio, for AI infrastructure.

The company focuses on overcoming the 'memory wall' in high-speed data transfer solutions.

Astera Labs integrates AI with biotechnology, diversifying beyond traditional semiconductor applications.

Upsides

Astera Labs' relocation to San Jose triples its operational capacity and talent acquisition.

Strategic partnership with Nvidia enhances Astera Labs' credibility in AI and semiconductor markets.

Recent investments from major financial entities indicate strong investor confidence in growth.

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