Junior Verification Engineer

Company Description

RISC-V International is a non-profit organization dedicated to driving the future development and adoption of the RISC-V Instruction Set Architecture (ISA). We enable a new era of processor innovation through open collaboration, allowing members to share technical investment, contribute to strategic futures, innovate rapidly, enjoy design freedom, and reduce the cost of innovation.

This is a full-time contract opportunity, dedicated to RISC-V International. Individuals and service companies are encouraged to apply. The contract will initially be for 6 months, with the possibility of extension in 1-year increments.

Learn more about RISC-V at: www.riscv.org

Position Overview

RISC-V International is seeking a Junior Verification Engineer to join our technical team. This role will focus on the development of tests for the certification program. Time will be billed hourly, with a maximum of 40 hours per week.

Expected Salary Range: $8,000 - $10,000 per month, based on experience.

Responsibilities

• Work as a member of the RISC-V International Technical Team and collaborate with the RISC-V CSC community to build and deliver certification tests and test plans.
• Attend RISC-V Certification Steering Committee (CSC) and work group meetings.
• Collaborate with certification working group members to support test case and test plan development and maintenance.
• Utilize simulation environments such as Sail, Spike, and QEMU for test evaluation and development as required by the CSC.
• Execute within a tools-based, repeatable process for evaluating test case coverage using SystemVerilog-based coverage tools.
• Collaborate with RISC-V open-source test suite communities to improve test coverage through test suite development and maintenance.
• Create and review documentation for test setup and execution of selected test suites.

Qualifications

Required:

• BS/BA degree in Electrical Engineering (EE) or Electrical and Computer Engineering (ECE).
• 2-3 years of experience developing processor verification tests.
• Mastery of UNIX/Linux-based scripting tools and languages (e.g., make, bash, perl, Python).
• Experience with coverage-driven verification testing.
• Experience with instruction set simulators (ISS).
• Experience using SystemVerilog.
• Experience writing and configuring verification tests in various environments (silicon, simulators, FPGA).
• Experience with GitHub, including CI/regression test automation.

Preferred:

• Master's or PhD degree in EE or ECE.
• Experience with RISC-V ISA and assembly language.
• Experience with QEMU, Spike, or Sail simulators.
• Experience with open-source software and hardware communities.

Additional Information

• Location Type: Remote
• Employment Type: Contract
• Department: Projects
• Industry: Information Technology and Services
• Function: Engineering
• Language: English

All information will be kept confidential according to EEO guidelines.