SoC Performance Architect – Intern (Summer 2026) at Cadence Design Systems

San Jose, California, United States

Cadence Design Systems Logo
Not SpecifiedCompensation
InternshipExperience Level
InternshipJob Type
UnknownVisa
Semiconductor, TechnologyIndustries

Requirements

  • Currently pursuing BS or MS in Electrical/Computer Engineering or equivalent
  • Strong coding skills in C++/SystemC, Python and similar programming languages
  • In depth understanding of computer architecture and memory hierarchy
  • Understand modeling concepts – cycle-level/cycle-accurate/event-driven
  • Experience developing models for components such as CPU, NoC, GPU, MMU, Caches, memory controllers

Responsibilities

  • Develop cycle-level C++/SystemC performance models
  • Perform architectural exploration and quantify system performance for different workloads (traffic generators, CPUs, GPUs) and benchmarks - datacenters, AI inference, automotive, applications
  • Collaborate with system and IP architects to translate findings into practical solutions that can influence the design and application of chiplet technology

Skills

Key technologies and capabilities for this role

C++SystemCPythonComputer ArchitectureMemory HierarchyCycle-Level ModelingGEM5NoCNPUMemory ControllerUCIeDDRLPDDRHBMRTLVerilogUVM

Questions & Answers

Common questions about this position

What are the required skills for the SoC Performance Architect Intern position?

Candidates must be currently pursuing a BS or MS in Electrical/Computer Engineering or equivalent, have strong coding skills in C++/SystemC, Python and similar languages, in-depth understanding of computer architecture and memory hierarchy, and experience with modeling concepts like cycle-level/cycle-accurate/event-driven.

Where is the SoC Performance Architect Intern position located?

The position is located in San Jose.

What does the role involve in terms of responsibilities?

Responsibilities include developing cycle-level C++/SystemC performance models, performing architectural exploration and quantifying system performance for workloads like datacenters, AI inference, and automotive, and collaborating with architects to influence chiplet technology designs.

What additional skills are preferred for this internship?

Preferred skills include experience with full system performance simulators like GEM5, knowledge of memory controllers and protocols like DDR, LPDDR, HBM, working with performance benchmarks, and understanding RTL-Verilog, SV, UVM with performance verification experience.

What is the company culture like at Cadence for this role?

Cadence hires and develops leaders and innovators who want to make an impact on technology, as part of the System Architecture team driving cutting-edge solutions for chiplet-based SoCs, with a focus on work that matters and solving challenging problems.

Cadence Design Systems

Provides EDA software and IP solutions

About Cadence Design Systems

Cadence Design Systems provides software, hardware, and intellectual property for the electronic design automation (EDA) industry, focusing on the design of semiconductor chips and electronic systems. Their products include tools for system design, verification, integrated circuit design, and custom and analog design. Cadence also offers IP solutions like Tensilica processors and DSPs, which are utilized in various applications, including AI, machine learning, and multimedia processing. Unlike many competitors, Cadence emphasizes continuous innovation and collaboration with industry leaders, which helps them maintain a strong position in the global market. The company's goal is to support clients in creating advanced electronic systems efficiently and effectively.

San Jose, CaliforniaHeadquarters
1988Year Founded
$4MTotal Funding
IPOCompany Stage
Automotive & Transportation, Hardware, AI & Machine LearningIndustries
10,001+Employees

Risks

Competition from Synopsys may impact Cadence's market share in AI applications.
High costs and complexity in 2nm technology development pose challenges.
$2.5 billion senior notes offering could affect financial flexibility.

Differentiation

Cadence leads in EDA with over 30 years of computational software expertise.
The company offers a broad IP portfolio, including Tensilica processors and DSPs.
Cadence collaborates on cutting-edge 2nm GAA and BSPDN technologies for advanced semiconductors.

Upsides

Growing demand for AI-driven design tools boosts Cadence's market opportunities.
Cadence's global expansion, especially in Asia, increases revenue potential.
Recognition as a top workplace enhances talent acquisition and innovation.

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