Senior / Staff Analog Design Engineer - High Speed SerDes at Flux

San Francisco, California, United States

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$194,000 – $270,000Compensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductors, Optics, TelecommunicationsIndustries

Requirements

7+ years of industry experience designing production high-speed SerDes, multi-GHz CDRs, or comparable mixed-signal I/O macros in advanced CMOS nodes
Demonstrated success taping out >56 Gb/s links meeting BER <10^-12, stringent jitter masks and channel compliance specs
Deep understanding of link-level signal-integrity, phase noise, adaptive equalisation, clock multiplication and on-chip calibration techniques
Mastery of state-of-the-art EDA flows: behavioral modeling (Verilog-A/AMS, IBIS-AMI), transient / S-parameter simulation, EM extraction, and mixed-signal verification
Strong measurement skills: high-speed probing, BERT eye-diagramming, de-embedding, PRBS and compliance testing
Bachelor’s degree in Electrical Engineering or related field (Master’s / PhD preferred)
Excellent cross-disciplinary communication, problem-solving aptitude, and a proven ability to deliver in fast-moving, innovation-driven environments
A portfolio of patents, publications or open-source contributions that highlights creative SerDes or high-speed analog design insight

Responsibilities

Define, design and verify SerDes cores operating at >25Gb/s-per-lane, including TX FIR/DFE equalisation, CTLE/FFE receivers, decision-feedback paths, and high-linearity output drivers
Develop adaptive clock-data-recovery (CDR) loops and multi-lane deskew / phase-alignment schemes that achieve <200 fs rms additive jitter and <5 ps lane-to-lane skew
Model channel losses (PCB, package, fibre) and work with signal-integrity engineers to co-optimise link budgets, impedance control and return-loss targets
Partner tightly with analog designers photonic, packaging, and digital micro-architecture teams to integrate SerDes IP into large chiplets and optical transceiver modules
Mentor junior engineers, conduct rigorous design reviews, and establish best-practice flows for high-speed mixed-signal design, verification and lab characterisation

Skills

Key technologies and capabilities for this role

Analog DesignRF IC DesignSerDesCDRCTLEDFEFFEFIRClock Data RecoverySignal IntegrityMixed-SignalCMOSVerilog-AEDA ToolsJitter AnalysisEqualizationPhase Alignment

Questions & Answers

Common questions about this position

What is the salary range for this position?

The salary range is $194,000 – $270,000, depending on experience, skills, and location.

Is this role remote or onsite?

This is an onsite position. Candidates who live within 20 minutes of the office receive an extra location bonus to their salary.

What skills and experience are required for this role?

Requires 7+ years designing production high-speed SerDes, multi-GHz CDRs, or comparable mixed-signal I/O macros in advanced CMOS nodes, with demonstrated success taping out >56 Gb/s links, deep understanding of signal-integrity, phase noise, adaptive equalisation, and mastery of EDA flows for behavioral modeling, simulation, and verification.

What benefits are offered for this position?

Benefits include competitive stock options, a location bonus for living within 20 minutes of the office, and financial and operational relocation support through a dedicated third-party provider.

What makes a strong candidate for this role?

Strong candidates have a Bachelor’s in Electrical Engineering (Master’s/PhD preferred), a portfolio of patents/publications/open-source contributions in SerDes or high-speed analog design, excellent cross-disciplinary communication, problem-solving skills, and the ability to mentor juniors in fast-moving environments.

Flux

AI-powered platform for PCB design

About Flux

Flux.ai provides a platform for designing and building printed circuit boards (PCBs) within the electronic design automation (EDA) market. The platform features an AI-powered assistant named Copilot, which helps users streamline the PCB design process, making it more efficient. Users can sign up for free and access basic features, with the option to upgrade to premium subscription plans for additional services. This freemium model allows engineers, designers, and electronics enthusiasts to engage with the platform at their own pace. Flux.ai differentiates itself from competitors by integrating AI assistance directly into the design workflow, enhancing user experience and accessibility in PCB design.

San Francisco, CaliforniaHeadquarters

2019Year Founded

$11.7MTotal Funding

EARLY_VCCompany Stage

Hardware, Consumer Software, AI & Machine LearningIndustries

51-200Employees

Benefits

Remote Work Options

Risks

Over-reliance on AI designs may lead to quality control issues and vulnerabilities.

New features like Smart Vias may increase complexity, potentially confusing users.

Intense competition from GenAI tools like SnapMagic could divert users from Flux.

Differentiation

Flux offers the first AI-powered hardware design assistant integrated into a PCB tool.

Flux's Copilot provides personalized design recommendations, enhancing user experience and efficiency.

Smart Vias technology simplifies high-density PCB designs, setting Flux apart from competitors.

Upsides

Increased adoption of AI tools boosts demand for Flux's innovative design platform.

Remote work trends align with Flux's cloud-based SaaS model, enhancing collaboration.

Generative AI advancements create opportunities for Flux to lead in hardware design.

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