Senior Engineer, Serdes Analog Design at Samsung Austin Semiconductor

San Jose, California, United States

Samsung Austin Semiconductor Logo
Not SpecifiedCompensation
Senior (5 to 8 years)Experience Level
Full TimeJob Type
UnknownVisa
SemiconductorIndustries

Requirements

  • Bachelors with 5+ years, Masters with 3+ years or PhDs with 0+ years of experience
  • Minimum 2+ years experience in RF/Analog/Serdes SoC design
  • Knowledge and experience with analog circuits/mixed signal circuits: such as bandgap, LDO, filters
  • Knowledge and experience with circuits of Serdes IPs: CTLE, DFE, FFE, clock distributions, PI, IQ generation
  • Knowledge of Serdes architecture and high-speed interconnect standards (USB, PCIe, UCIe)
  • Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus
  • Well-versed in EDA tools (Cadence, Spectre, Totem, EMX)
  • Comfortable with scripting languages (Python, Matlab)
  • Inclusive, adapting style to situations and diverse global norms
  • Avid learner, approaching challenges with curiosity and resilience, seeking data
  • Collaborative, building relationships, offering support, welcoming approaches
  • Innovative and creative, proactively exploring new ideas and adapting to change
  • Daily onsite presence at San Jose, CA headquarters

Responsibilities

  • Actively work on architecture and circuits of high-speed interconnect transceiver (Serdes)
  • Work on circuits for Serdes IPs, clock generation, and traditional analog circuits
  • Work with a team to develop high-performance and low-power Serdes, including display interface, camera sensor interface, UCIe/die-to-die interconnect, and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies
  • Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies
  • Translate component design specifications to schematics
  • Build simulation test-benches to evaluate circuit performance, functionality, power consumption, and reliability
  • Supervise layout designers to generate LVS/DRC clean layout
  • Optimize layout to improve power consumption and performance of circuits
  • Perform functionality and performance validation in Silicon

Skills

Key technologies and capabilities for this role

SerDesAnalog DesignHigh-Speed InterconnectTransceiverClock GenerationLow-Power DesignUCIeDie-to-Die InterconnectEthernetCustom Digital CircuitsDisplay InterfaceCamera Sensor Interface

Questions & Answers

Common questions about this position

Is this role remote or onsite?

The role requires daily onsite presence at the San Jose, CA headquarters in alignment with the Flexible Work policy.

What experience level is required for this position?

A Bachelor's with 5+ years, Master's with 3+ years, or PhD with 0+ years of experience is required, along with minimum 2+ years of RF/Analog/Serdes SoC design experience.

What key technical skills are needed for this Senior Engineer role?

Candidates need knowledge of analog/mixed-signal circuits like bandgap, LDO, filters; Serdes IP circuits including CTLE, DFE, FFE, clock distributions, PI, IQ generation; and Serdes architecture with standards like USB, PCIe, UCIe. Experience with ESD, PLL, clock generation, ADC, DAC is a plus, along with proficiency in EDA tools like Cadence and Spectre.

What is the company culture like at Samsung Semiconductor?

The company emphasizes an inclusive culture, diverse workforce, commitment to learning and growth, and excelling in collaboration within and across teams.

What makes a strong candidate for this Serdes Analog Design role?

Strong candidates will have the required education and experience levels, hands-on expertise in Serdes and analog circuit design, familiarity with high-speed interconnect standards, and proficiency in EDA tools for schematic design, simulation, and layout supervision.

Samsung Austin Semiconductor

Develops advanced semiconductor technology solutions

About Samsung Austin Semiconductor

Samsung Semiconductor specializes in cutting-edge semiconductor technologies, offering ultra-high resolution sensors, ultra-fine pixel technology, gaming storage, automotive memory solutions, AI advancements, and EUV advanced processing, providing transformative solutions for device manufacturers.

Laxmi Sagar Layout, Mahadevapura, Bengaluru, Karnataka 560048, IndiaHeadquarters
N/AYear Founded
VENTURE_UNKNOWNCompany Stage
Hardware, Consumer SoftwareIndustries
5,001-10,000Employees

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