Senior ASIC Design Engineer
NVIDIA- Full Time
- Senior (5 to 8 years)
Candidates must have at least 5 years of work experience in RTL development and experience with high-speed digital logic. Proficiency in standard RTL design and synthesis tools is required, along with familiarity with verification work and writing test benches. Candidates should be able to learn quickly about transformers and modern artificial intelligence, and be willing to start quickly. Strong candidates may also have experience with PCIe, Ethernet, or HBM technologies, as well as familiarity with transformer models and machine learning, and the ability to program with Python or another scripting language.
As an RTL Engineer at Etched, you will develop and implement design verification strategies for existing and upcoming ASIC designs. You will work closely with state-of-the-art architectures for machine learning and provide feedback to the uArch team to ensure that blocks meet timing and area constraints. You will be responsible for implementing a block to efficiently compute floating point math operators and will work in a fast-paced environment with a high degree of autonomy.
Develops servers for transformer inference
The company specializes in developing powerful servers for transformer inference, utilizing transformer architecture integrated into their chips to achieve highly efficient and advanced technology. The main technologies used in the product are transformer architecture and advanced chip integration.