Sr. ASIC Design Verification Engineer
GroqFull Time
Senior (5 to 8 years)
San Jose, California, United States
Key technologies and capabilities for this role
Common questions about this position
The role requires daily onsite presence in San Jose HQ or Folsom Office location 5 days/week, with an average of 10% travel per month.
Candidates need a Bachelor's with 20+ years, Master's with 18+ years, or PhD with 15+ years in ASIC Verification, strong UVM experience, proficiency in C++ and SystemVerilog, experience in logic and SoC verification from planning to closure, and knowledge of UCIe, HBM controller, and Memory DFT.
This information is not specified in the job description.
The company emphasizes an inclusive culture and diverse workforce that drives innovation and growth, with a dedication to empowering people to be their true selves while building a better tomorrow for employees, customers, partners, and communities.
A strong candidate will have extensive industry experience in ASIC Verification (15-20+ years depending on degree), deep expertise in UVM, C++, SystemVerilog, and specific technologies like UCIe and HBM controllers, plus be a self-motivated problem-solver who works well in a team.
Develops advanced semiconductor technology solutions
Samsung Semiconductor specializes in cutting-edge semiconductor technologies, offering ultra-high resolution sensors, ultra-fine pixel technology, gaming storage, automotive memory solutions, AI advancements, and EUV advanced processing, providing transformative solutions for device manufacturers.