Staff Emulation & FPGA Prototyping Engineer
Untether AIFull Time
Senior (5 to 8 years)
Key technologies and capabilities for this role
Common questions about this position
The salary range is $142.5K - $237.5K.
This is a hybrid role requiring onsite presence at the Santa Clara, CA headquarters 3 days per week.
Requirements include 5+ years of FPGA design and verification experience, expertise in HDLs like Verilog or VHDL, familiarity with RISC-V architecture, and experience with scripting languages like Python. Additional needs cover hardware-software integration, industry-standard protocols (MCTP, PLDM, SPDM), BMC, power management, and hardware security.
The culture emphasizes respect, collaboration, humility, direct communication, and inclusivity, seeking passionate individuals who thrive in dynamic environments.
Strong candidates have a Bachelor’s or Master’s in Electrical/Computer Engineering, 5+ years in FPGA design/verification, expertise in HDLs and RISC-V, plus experience with protocols like MCTP/PLDM/SPDM, BMC, power management, security, and Python scripting, along with excellent problem-solving and teamwork skills.
AI compute platform for datacenters
d-Matrix focuses on improving the efficiency of AI computing for large datacenter customers. Its main product is the digital in-memory compute (DIMC) engine, which combines computing capabilities directly within programmable memory. This design helps reduce power consumption and enhances data processing speed while ensuring accuracy. d-Matrix differentiates itself from competitors by offering a modular and scalable approach, utilizing low-power chiplets that can be tailored for different applications. The company's goal is to provide high-performance, energy-efficient AI inference solutions to large-scale datacenter operators.