d-Matrix

FPGA Design Engineer, Staff

Santa Clara, California, United States

$142,500 – $237,500Compensation
Senior (5 to 8 years), Junior (1 to 2 years)Experience Level
Full TimeJob Type
UnknownVisa
AI & Machine Learning, Hardware, Enterprise SoftwareIndustries

Requirements

Candidates should have a Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with a Master's degree preferred. A minimum of 5+ years of experience in FPGA design and verification is required. Expertise in hardware design using Hardware Description Languages (HDLs) like Verilog or VHDL is essential. Familiarity with RISC-V architecture and embedded systems development is needed, along with an understanding of hardware-software integration concepts. Experience with scripting languages like Python for test automation is necessary, as well as knowledge of industry-standard management protocols (MCTP, PLDM, SPDM) and platform BMC. Candidates should also possess strong analytical and problem-solving skills, excellent communication, collaboration, and teamwork abilities, and knowledge of power management techniques (PMBus) and hardware security concepts.

Responsibilities

The FPGA Design Engineer will design and verify FPGA-based solutions for AI inference accelerator management and define FPGA microarchitecture specifications while collaborating with stakeholders. They will develop resilient dual boot architecture for multi-core multi-chiplet booting, design and implement hardware and software modules for platform power management, health monitoring, and telemetry data acquisition. The role includes interfacing with host server BMC through SMBus mailbox, integrating RISC-V CPU cores and related firmware into FPGA designs, and developing an eFuse controller within the FPGA. Additionally, they will design and integrate a secure boot solution adhering to NIST standards, collaborate with cross-functional teams for hardware-software integration, and author Python scripts for hardware testing and automation.

Skills

Verilog
VHDL
RISC-V
Python
Hardware Description Languages
Hardware-Software Integration
FPGA Design
FPGA Verification
Test Automation
MCTP
PLDM
SPDM
Platform BMC
PMBus
Secure Boot
Cloud Server Architectures

d-Matrix

AI compute platform for datacenters

About d-Matrix

d-Matrix focuses on improving the efficiency of AI computing for large datacenter customers. Its main product is the digital in-memory compute (DIMC) engine, which combines computing capabilities directly within programmable memory. This design helps reduce power consumption and enhances data processing speed while ensuring accuracy. d-Matrix differentiates itself from competitors by offering a modular and scalable approach, utilizing low-power chiplets that can be tailored for different applications. The company's goal is to provide high-performance, energy-efficient AI inference solutions to large-scale datacenter operators.

Key Metrics

Santa Clara, CaliforniaHeadquarters
2019Year Founded
$149.8MTotal Funding
SERIES_BCompany Stage
Enterprise Software, AI & Machine LearningIndustries
201-500Employees

Benefits

Hybrid Work Options

Risks

Competition from Nvidia, AMD, and Intel may pressure d-Matrix's market share.
Complex AI chip design could lead to delays or increased production costs.
Rapid AI innovation may render d-Matrix's technology obsolete if not updated.

Differentiation

d-Matrix's DIMC engine integrates compute into memory, enhancing efficiency and accuracy.
The company offers scalable AI solutions through modular, low-power chiplets.
d-Matrix focuses on brain-inspired AI compute engines for diverse inferencing workloads.

Upsides

Growing demand for energy-efficient AI solutions boosts d-Matrix's low-power chiplets appeal.
Partnerships with companies like Microsoft could lead to strategic alliances.
Increasing adoption of modular AI hardware in data centers benefits d-Matrix's offerings.

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