Staff Certification Engineer
WiskSalary not specified
Full Time
Expert & Leadership (9+ years)
$142,500 – $230,000Compensation
Senior (5 to 8 years)Experience Level
Full TimeJob Type
UnknownVisa
Semiconductor, Artificial IntelligenceIndustries
Requirements
- BS in Electrical Engineering, Computer Science or related field with 10+ years of Industry experience or MS Electrical Engineering, Computer Science or related field preferred with 7+ years industry experience
- Experience in SoC verification cycle from architecture to tape out to bring up
- Good knowledge of verification methodologies such as UVM/OVM etc
- Hands on ASIC-SoC Design verification tests and debug experience
- Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology
- Good problem-solving skills, and the passion to take on challenges (particularly in AI domain)
- Good experience with SystemVerilog, and verification methodology (UVM/OVM/VMM)
- Passionate about AI and thriving in a fast-paced and dynamic startup culture
- Preferred
- Experience with C/C++, SystemC (a big plus!)
- Successfully lead creation/implementation of multiple SoC verification environments and tape out efforts
Responsibilities
- (No specific responsibilities listed in the job description; role involves working on path-breaking architecture in design verification as Senior Staff Engineer.)
Skills
Key technologies and capabilities for this role
Questions & Answers
Common questions about this position
What is the salary range for the Senior Staff Design Verification Engineer position?
The salary range is $142.5K - $230K.
Is this a remote, hybrid, or onsite role, and what are the location details?
This is a hybrid role requiring 3 days per week onsite at the Santa Clara, CA HQ.
What key skills and experience are required for this Design Verification Engineer role?
Candidates need a BS in Electrical Engineering, Computer Science or related field with 10+ years of industry experience (or MS with 7+ years), experience in SoC verification cycle, good knowledge of UVM/OVM methodologies, hands-on ASIC-SoC verification tests and debug, fluency with SystemVerilog randomization constraints, coverage, and assertions, plus good problem-solving skills.
What is the company culture like at d-Matrix?
The culture emphasizes respect, collaboration, humility, direct communication, inclusiveness, transparency, intellectual honesty, continuous learning, and fun, with a diverse team that values differing perspectives for better solutions.
What makes a strong candidate for this Senior Staff Design Verification Engineer role?
Strong candidates are passionate about AI, thrive in a fast-paced startup culture, have solid problem-solving skills and passion for challenges (especially in AI), and preferably experience with C/C++, SystemC, and leading SoC verification environments to tape out.
d-Matrix
AI compute platform for datacenters
About d-Matrix
d-Matrix focuses on improving the efficiency of AI computing for large datacenter customers. Its main product is the digital in-memory compute (DIMC) engine, which combines computing capabilities directly within programmable memory. This design helps reduce power consumption and enhances data processing speed while ensuring accuracy. d-Matrix differentiates itself from competitors by offering a modular and scalable approach, utilizing low-power chiplets that can be tailored for different applications. The company's goal is to provide high-performance, energy-efficient AI inference solutions to large-scale datacenter operators.
Santa Clara, CaliforniaHeadquarters
2019Year Founded
$149.8MTotal Funding
SERIES_BCompany Stage
Enterprise Software, AI & Machine LearningIndustries
201-500Employees