Design Verification Engineer, Senior Staff at d-Matrix

Santa Clara, California, United States

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$161,300 – $260,000Compensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductors, Artificial IntelligenceIndustries

Skills

Key technologies and capabilities for this role

SystemVerilogUVMOVMVMMSystemCC++SoC VerificationASIC VerificationCoverageAssertionsRandomization Constraints

Questions & Answers

Common questions about this position

What is the salary range for this position?

The salary range is $161.3K - $260K.

Is this role remote or hybrid, and what are the location requirements?

This is a hybrid role requiring onsite presence at the Santa Clara, CA headquarters 3 days per week.

What are the key skills required for this Design Verification Engineer role?

Key requirements include 15+ years experience with BS or 12+ with MS in EE/CS, experience in SoC verification from architecture to tape out, knowledge of UVM/OVM methodologies, hands-on SystemVerilog for tests/debug, randomization constraints, coverage, assertions, and strong problem-solving skills.

What is the company culture like at d-Matrix?

The culture emphasizes respect, collaboration, humility, direct communication, transparency, inclusiveness, and intellectual honesty, with a focus on learning and having fun.

What makes a strong candidate for this Senior Staff Design Verification Engineer position?

Strong candidates have extensive industry experience (15+ years with BS or 12+ with MS), proven SoC verification expertise including UVM/OVM and SystemVerilog, leadership in verification environments and tape-outs, plus passion for AI challenges.

d-Matrix

AI compute platform for datacenters

About d-Matrix

d-Matrix focuses on improving the efficiency of AI computing for large datacenter customers. Its main product is the digital in-memory compute (DIMC) engine, which combines computing capabilities directly within programmable memory. This design helps reduce power consumption and enhances data processing speed while ensuring accuracy. d-Matrix differentiates itself from competitors by offering a modular and scalable approach, utilizing low-power chiplets that can be tailored for different applications. The company's goal is to provide high-performance, energy-efficient AI inference solutions to large-scale datacenter operators.

Santa Clara, CaliforniaHeadquarters

2019Year Founded

$149.8MTotal Funding

SERIES_BCompany Stage

Enterprise Software, AI & Machine LearningIndustries

201-500Employees

Benefits

Hybrid Work Options

Risks

Competition from Nvidia, AMD, and Intel may pressure d-Matrix's market share.

Complex AI chip design could lead to delays or increased production costs.

Rapid AI innovation may render d-Matrix's technology obsolete if not updated.

Differentiation

d-Matrix's DIMC engine integrates compute into memory, enhancing efficiency and accuracy.

The company offers scalable AI solutions through modular, low-power chiplets.

d-Matrix focuses on brain-inspired AI compute engines for diverse inferencing workloads.

Upsides

Growing demand for energy-efficient AI solutions boosts d-Matrix's low-power chiplets appeal.

Partnerships with companies like Microsoft could lead to strategic alliances.

Increasing adoption of modular AI hardware in data centers benefits d-Matrix's offerings.

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