Sr. Physical Design Engineer
GroqSalary not specified
Full Time
Senior (5 to 8 years)
Not SpecifiedCompensation
InternshipExperience Level
Full TimeJob Type
UnknownVisa
Semiconductors, Artificial IntelligenceIndustries
Requirements
- Master’s Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent work experience
- A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture
- Experience in Verilog, System Verilog or similar HVL
- Experience with CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution, packaging, P&R and timing closure
- Strong communication and interpersonal skills and ability & desire to work as a great teammate
- Python, Perl and C/C++ programming language experience
- Experience using AI coding assistants like Cursor or Github copilot or Windchill
- Ways to stand out from the crowd
- Experience in driving development of large-scale ASIC floorplan
- Experience building large projects from the ground up using AI tools
- Good command of spoken English
Responsibilities
- Working with architects, design leads, physical design leads and package leads, develop and craft and optimize floorplans during early chip development
- Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities
- Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions
- Build tools and improve existing infrastructure using AI extensively to optimize chip area and speed of execution
Skills
Key technologies and capabilities for this role
Questions & Answers
Common questions about this position
What degree is required for the ASIC TOP Floorplan Intern position?
A Master’s Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent work experience is required.
What technical skills are needed for this role?
Candidates need a deep hardware engineering background in VLSI and/or Computer Architecture, experience in Verilog, System Verilog or similar HVL, CAD and physical design methodologies including chip floorplan, power/clock distribution, packaging, P&R and timing closure, and Python, Perl and C/C++ programming.
Is remote work an option for this internship?
This information is not specified in the job description.
What is the compensation for this position?
This information is not specified in the job description.
What makes a candidate stand out for this role?
Experience in driving development of large-scale ASIC floorplan, building large projects from the ground up using AI tools, and good command of spoken English will help candidates stand out.
NVIDIA
Designs GPUs and AI computing solutions
About NVIDIA
NVIDIA designs and manufactures graphics processing units (GPUs) and system on a chip units (SoCs) for various markets, including gaming, professional visualization, data centers, and automotive. Their products include GPUs tailored for gaming and professional use, as well as platforms for artificial intelligence (AI) and high-performance computing (HPC) that cater to developers, data scientists, and IT administrators. NVIDIA generates revenue through the sale of hardware, software solutions, and cloud-based services, such as NVIDIA CloudXR and NGC, which enhance experiences in AI, machine learning, and computer vision. What sets NVIDIA apart from competitors is its strong focus on research and development, allowing it to maintain a leadership position in a competitive market. The company's goal is to drive innovation and provide advanced solutions that meet the needs of a diverse clientele, including gamers, researchers, and enterprises.
Santa Clara, CaliforniaHeadquarters
1993Year Founded
$19.5MTotal Funding
IPOCompany Stage
Automotive & Transportation, Enterprise Software, AI & Machine Learning, GamingIndustries
10,001+Employees