Staff Engineer, AI/ML for Circuit Design at Samsung Austin Semiconductor

San Jose, California, United States

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Not SpecifiedCompensation

Senior (5 to 8 years), Expert & Leadership (9+ years)Experience Level

Full TimeJob Type

UnknownVisa

Semiconductor, Display TechnologyIndustries

Requirements

BS in Computer Science or equivalent with minimum 5+ years experience, or MS in Computer Science with 3+ years, or PhD with 0+ years in Electrical Engineering/Computer Engineering/Applied Physics (or equivalent experience)
Proficiency with SPICE/Spectre/HSPICE/Cadence Virtuoso/ADE; layout and parasitic extraction
Strong Python and ML fundamentals (PyTorch or TensorFlow, scikit-learn/NumPy/Pandas)
Experience building and validating surrogate models and running multi-objective optimization
Experience with Reinforcement Learning (RL), Diffusion models, and Graph Neural Networks (GNN)
Hands-on experience with EDA tools for layout assembly, placement and routing, parasitic capacitance extraction, pixel circuit area compaction, etc
Knowledge of classical algorithms for placement and routing in chip design
Solid analog/digital circuit fundamentals; hands-on OLED pixel/gate driver design
Experience with Cadence Innovus, Synopsys Fusion Compiler, Aprisa, GDSFactory, KLayout (plus)
Publications/patents in display, EDA, or ML-for-hardware (plus)
Inclusive, adapting style to situations and diverse global norms
Avid learner, approaching challenges with curiosity and resilience, seeking data
Collaborative, building relationships, humbly offering support and openly welcoming

Responsibilities

Develop EDA design workflows for pixel circuits for OLEDs
Create automatic scripts for schematic generation and layout assembly
Apply Reinforcement Learning and/or Diffusion models for placement and routing (P&R) and compare their efficacy with classical P&R algorithms
Build AI-based surrogate models for parasitic capacitance extraction
Apply Graph Neural Networks (GNN) for circuit design and/or surrogate models for circuit parameters estimation
Apply design of experiments (DoE) and optimization methods to accelerate simulation and parameter tuning
Develop optimization algorithms for pixel array compaction
Contribute to continuous improvement of model accuracy through active learning and uncertainty analysis

Skills

Key technologies and capabilities for this role

AIMLEDACircuit DesignPixel LayoutPlacement and RoutingParasitic Capacitance ExtractionPhysics-Based MethodsPanel Layout OptimizationOLEDMicro-LEDPython

Questions & Answers

Common questions about this position

Is this role remote or onsite?

The role requires daily onsite presence at the San Jose, CA office in alignment with the company's Flexible Work policy.

What are the education and experience requirements?

Candidates need a BS in Computer Science or equivalent with 5+ years experience, MS in Computer Science with 3+ years, or PhD with 0+ years in Electrical Engineering/Computer Engineering/Applied Physics (or equivalent).

What technical skills and tools are required?

Proficiency is required in SPICE/Spectre/HSPICE/Cadence Virtuoso/ADE, layout and parasitic extraction, strong Python, and ML fundamentals.

What is the company culture like?

The company emphasizes an inclusive culture, diverse workforce, and empowering people to be their true selves, with a dynamic team of researchers and engineers collaborating on innovative AI/ML projects for chip design.

What experience makes a strong candidate for this role?

A strong candidate has expertise in circuit/pixel layout design, placement and routing, parasitic capacitance extraction, circuit evaluation, and fusing physics-based methods with AI/ML, plus background as an EDA engineer supporting pixel circuits for advanced displays.

Samsung Austin Semiconductor

Develops advanced semiconductor technology solutions

About Samsung Austin Semiconductor

Samsung Semiconductor specializes in cutting-edge semiconductor technologies, offering ultra-high resolution sensors, ultra-fine pixel technology, gaming storage, automotive memory solutions, AI advancements, and EUV advanced processing, providing transformative solutions for device manufacturers.

Laxmi Sagar Layout, Mahadevapura, Bengaluru, Karnataka 560048, IndiaHeadquarters

N/AYear Founded

VENTURE_UNKNOWNCompany Stage

Hardware, Consumer SoftwareIndustries

5,001-10,000Employees