Staff Emulation & FPGA Prototyping Engineer
Untether AISalary not specified
Full Time
Senior (5 to 8 years)
$130,000 – $175,000Compensation
Senior (5 to 8 years)Experience Level
Full TimeJob Type
UnknownVisa
Wireless Communications, TelecommunicationsIndustries
Requirements
- BSEE required/MSEE preferred
- 6+ years of related experience in logic designs for FPGA
- Proficiency with Xilinx Vivado or Intel Quartus FPGA synthesis, place & route tools
- Proficiency with Verilog, System Verilog, digital logic design, simulation, and FPGA implementation
- Experience with debugging FPGA logic designs using Vivado chipscope or Quartus signal tap
- Familiarity with common scripting tools such as python
- Able to program in C or MatLab (a plus)
Responsibilities
- Implementing, debugging, and verifying designs in large FPGAs
- Participating in sub-system and system level integration, validation, and troubleshooting
- Performing FPGA level logic design, simulation, test, and debugging tasks
- Participating in module level design and simulating a specified functional block or sub-system
- Generating design documentation and reviewing test results
- Interfacing with software and hardware designers to support software, hardware, and system integration
Skills
Key technologies and capabilities for this role
Questions & Answers
Common questions about this position
What is the salary range for the Senior FPGA Design Engineer position?
The salary range is $130,000 to $175,000, with compensation determined by skill set, experience, and location.
Is this a remote position or does it require office work?
This information is not specified in the job description.
What are the key skills required for this FPGA design role?
Key requirements include 6+ years of FPGA logic design experience, proficiency with Xilinx Vivado or Intel Quartus tools, Verilog/SystemVerilog, debugging with chipscope or signal tap, and scripting in Python.
What benefits does Tarana offer?
Benefits include medical, dental and vision coverage, 401K match, flexible time off, and stock options.
What makes a strong candidate for this Senior FPGA Design Engineer role?
A strong candidate has a BSEE (MSEE preferred), 6+ years of FPGA logic design experience, proficiency in required tools and languages, plus preferred experience in wireless PHY or DSP algorithms in FPGA.
Parallel Wireless
Provides 5G wireless infrastructure solutions
About Parallel Wireless
Parallel Wireless provides wireless infrastructure solutions focused on the 5G market, utilizing OpenRAN technology to create open and interoperable mobile networks. Their products help clients like mobile network operators and governments reduce the complexity and cost of deploying and maintaining wireless networks. By offering both hardware and software components, Parallel Wireless enables flexible and scalable network designs that can adapt to changing demands. The company's goal is to lead the telecommunications industry towards more accessible and affordable 5G solutions.
Nashua, New HampshireHeadquarters
2012Year Founded
$1.8MTotal Funding
CONVERTIBLECompany Stage
Hardware, Enterprise SoftwareIndustries
501-1,000Employees