Staff Emulation & FPGA Prototyping Engineer
Untether AIFull Time
Senior (5 to 8 years)
Key technologies and capabilities for this role
Common questions about this position
The position requires 10+ years of experience in verification in IP/FPGA/SoC/ASIC, along with proven expertise in RTL design and verification for FPGA architectures.
Key skills include hands-on experience with OVM/UVM, System Verilog, and constrained random verification methodologies, plus strong background in simulation tools such as ModelSim, Questa, VCS, or similar EDA simulators.
The role includes leading or mentoring a team of engineers on FPGA IP verification, defining priorities, setting goals, monitoring performance, and fostering collaboration and technical excellence.
This information is not specified in the job description.
Candidates need proven ability to lead and develop technical teams, strong problem-solving and analytical skills, and excellent communication and stakeholder management skills.
Develops digital human agents for AI
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